Searched refs:RCC_CCIPR2_I2C5SEL_Pos (Results 1 – 9 of 9) sorted by relevance
547 #define LL_RCC_I2C5_CLKSOURCE_PCLK1 ((RCC_OFFSET_CCIPR2 << 24U) | (RCC_CCIPR2_I2C5SEL_Pos <…548 #define LL_RCC_I2C5_CLKSOURCE_SYSCLK ((RCC_OFFSET_CCIPR2 << 24U) | (RCC_CCIPR2_I2C5SEL_Pos <…549 … (RCC_CCIPR2_I2C5SEL_0 >> RCC_CCIPR2_I2C5SEL_Pos)) /*!< SYSCLK clock used as I2C5 clock source */550 #define LL_RCC_I2C5_CLKSOURCE_HSI ((RCC_OFFSET_CCIPR2 << 24U) | (RCC_CCIPR2_I2C5SEL_Pos <…551 … (RCC_CCIPR2_I2C5SEL_1 >> RCC_CCIPR2_I2C5SEL_Pos)) /*!< HSI clock used as I2C5 clock source */552 #define LL_RCC_I2C5_CLKSOURCE_MSIK ((RCC_OFFSET_CCIPR2 << 24U) | (RCC_CCIPR2_I2C5SEL_Pos <…553 … (RCC_CCIPR2_I2C5SEL >> RCC_CCIPR2_I2C5SEL_Pos)) /*!< MSIK clock used as I2C5 clock source */888 #define LL_RCC_I2C5_CLKSOURCE ((RCC_OFFSET_CCIPR2 << 24U) | (RCC_CCIPR2_I2C5SEL_Pos << …889 … (RCC_CCIPR2_I2C5SEL >> RCC_CCIPR2_I2C5SEL_Pos)) /*!< I2C1 Clock source selection */
17772 #define RCC_CCIPR2_I2C5SEL_Pos (24U) macro17773 #define RCC_CCIPR2_I2C5SEL_Msk (0x3UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0300000…17775 #define RCC_CCIPR2_I2C5SEL_0 (0x1UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0100000…17776 #define RCC_CCIPR2_I2C5SEL_1 (0x2UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0200000…
18382 #define RCC_CCIPR2_I2C5SEL_Pos (24U) macro18383 #define RCC_CCIPR2_I2C5SEL_Msk (0x3UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0300000…18385 #define RCC_CCIPR2_I2C5SEL_0 (0x1UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0100000…18386 #define RCC_CCIPR2_I2C5SEL_1 (0x2UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0200000…
19365 #define RCC_CCIPR2_I2C5SEL_Pos (24U) macro19366 #define RCC_CCIPR2_I2C5SEL_Msk (0x3UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0300000…19368 #define RCC_CCIPR2_I2C5SEL_0 (0x1UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0100000…19369 #define RCC_CCIPR2_I2C5SEL_1 (0x2UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0200000…
21546 #define RCC_CCIPR2_I2C5SEL_Pos (24U) macro21547 #define RCC_CCIPR2_I2C5SEL_Msk (0x3UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0300000…21549 #define RCC_CCIPR2_I2C5SEL_0 (0x1UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0100000…21550 #define RCC_CCIPR2_I2C5SEL_1 (0x2UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0200000…
19975 #define RCC_CCIPR2_I2C5SEL_Pos (24U) macro19976 #define RCC_CCIPR2_I2C5SEL_Msk (0x3UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0300000…19978 #define RCC_CCIPR2_I2C5SEL_0 (0x1UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0100000…19979 #define RCC_CCIPR2_I2C5SEL_1 (0x2UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0200000…
22506 #define RCC_CCIPR2_I2C5SEL_Pos (24U) macro22507 #define RCC_CCIPR2_I2C5SEL_Msk (0x3UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0300000…22509 #define RCC_CCIPR2_I2C5SEL_0 (0x1UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0100000…22510 #define RCC_CCIPR2_I2C5SEL_1 (0x2UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0200000…
22156 #define RCC_CCIPR2_I2C5SEL_Pos (24U) macro22157 #define RCC_CCIPR2_I2C5SEL_Msk (0x3UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0300000…22159 #define RCC_CCIPR2_I2C5SEL_0 (0x1UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0100000…22160 #define RCC_CCIPR2_I2C5SEL_1 (0x2UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0200000…
23116 #define RCC_CCIPR2_I2C5SEL_Pos (24U) macro23117 #define RCC_CCIPR2_I2C5SEL_Msk (0x3UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0300000…23119 #define RCC_CCIPR2_I2C5SEL_0 (0x1UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0100000…23120 #define RCC_CCIPR2_I2C5SEL_1 (0x2UL << RCC_CCIPR2_I2C5SEL_Pos) /*!< 0x0200000…
