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Searched refs:RCC_CCIPR1_USART3SEL_Pos (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_rcc.h472 #define LL_RCC_USART3_CLKSOURCE_PCLK1 ((RCC_OFFSET_CCIPR1 << 24U) |(RCC_CCIPR1_USART3SEL_Pos …
473 … ((RCC_OFFSET_CCIPR1 << 24U) |(RCC_CCIPR1_USART3SEL_Pos << 16U) | (RCC_CCIPR1_USART3SEL_0 >> RCC…
474 … ((RCC_OFFSET_CCIPR1 << 24U) |(RCC_CCIPR1_USART3SEL_Pos << 16U) | (RCC_CCIPR1_USART3SEL_1 >> RCC…
475 … ((RCC_OFFSET_CCIPR1 << 24U) |(RCC_CCIPR1_USART3SEL_Pos << 16U) | (RCC_CCIPR1_USART3SEL >> RCC_…
801 #define LL_RCC_USART3_CLKSOURCE ((RCC_OFFSET_CCIPR1 << 24U) | (RCC_CCIPR1_USART3SEL_Pos <…
802 … (RCC_CCIPR1_USART3SEL >> RCC_CCIPR1_USART3SEL_Pos)) /*!< USART3 Clock source selection */
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_rcc.h573 …E_PCLK1 LL_CLKSOURCE(CCIPR1_OFFSET, RCC_CCIPR1_USART3SEL, RCC_CCIPR1_USART3SEL_Pos, 0x000000…
574 …E_PLL2Q LL_CLKSOURCE(CCIPR1_OFFSET, RCC_CCIPR1_USART3SEL, RCC_CCIPR1_USART3SEL_Pos, RCC_CCIP…
576 …E_PLL3Q LL_CLKSOURCE(CCIPR1_OFFSET, RCC_CCIPR1_USART3SEL, RCC_CCIPR1_USART3SEL_Pos, RCC_CCIP…
578 …E_HSI LL_CLKSOURCE(CCIPR1_OFFSET, RCC_CCIPR1_USART3SEL, RCC_CCIPR1_USART3SEL_Pos, RCC_CCIP…
579 …E_CSI LL_CLKSOURCE(CCIPR1_OFFSET, RCC_CCIPR1_USART3SEL, RCC_CCIPR1_USART3SEL_Pos, RCC_CCIP…
580 …E_LSE LL_CLKSOURCE(CCIPR1_OFFSET, RCC_CCIPR1_USART3SEL, RCC_CCIPR1_USART3SEL_Pos, RCC_CCIP…
996 …URCE LL_CLKSOURCE(CCIPR1_OFFSET, RCC_CCIPR1_USART3SEL, RCC_CCIPR1_USART3SEL_Pos, 0x000000…
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h9208 #define RCC_CCIPR1_USART3SEL_Pos (6U) macro
9209 #define RCC_CCIPR1_USART3SEL_Msk (0x7UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x000001C0…
9211 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x00000040…
9212 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x00000080…
9213 #define RCC_CCIPR1_USART3SEL_2 (0x4UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x00000100…
Dstm32h523xx.h13635 #define RCC_CCIPR1_USART3SEL_Pos (6U) macro
13636 #define RCC_CCIPR1_USART3SEL_Msk (0x7UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x000001C0…
13638 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x00000040…
13639 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x00000080…
13640 #define RCC_CCIPR1_USART3SEL_2 (0x4UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x00000100…
Dstm32h562xx.h14525 #define RCC_CCIPR1_USART3SEL_Pos (6U) macro
14526 #define RCC_CCIPR1_USART3SEL_Msk (0x7UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x000001C0…
14528 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x00000040…
14529 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x00000080…
14530 #define RCC_CCIPR1_USART3SEL_2 (0x4UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x00000100…
Dstm32h533xx.h14184 #define RCC_CCIPR1_USART3SEL_Pos (6U) macro
14185 #define RCC_CCIPR1_USART3SEL_Msk (0x7UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x000001C0…
14187 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x00000040…
14188 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x00000080…
14189 #define RCC_CCIPR1_USART3SEL_2 (0x4UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x00000100…
Dstm32h573xx.h17167 #define RCC_CCIPR1_USART3SEL_Pos (6U) macro
17168 #define RCC_CCIPR1_USART3SEL_Msk (0x7UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x000001C0…
17170 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x00000040…
17171 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x00000080…
17172 #define RCC_CCIPR1_USART3SEL_2 (0x4UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x00000100…
Dstm32h563xx.h16618 #define RCC_CCIPR1_USART3SEL_Pos (6U) macro
16619 #define RCC_CCIPR1_USART3SEL_Msk (0x7UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x000001C0…
16621 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x00000040…
16622 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x00000080…
16623 #define RCC_CCIPR1_USART3SEL_2 (0x4UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x00000100…
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h12068 #define RCC_CCIPR1_USART3SEL_Pos (4U) macro
12069 #define RCC_CCIPR1_USART3SEL_Msk (0x3UL << RCC_CCIPR1_USART3SEL_Pos)/*!< 0x00000030 */
12071 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos)/*!< 0x00000010 */
12072 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos)/*!< 0x00000020 */
Dstm32l562xx.h12798 #define RCC_CCIPR1_USART3SEL_Pos (4U) macro
12799 #define RCC_CCIPR1_USART3SEL_Msk (0x3UL << RCC_CCIPR1_USART3SEL_Pos)/*!< 0x00000030 */
12801 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos)/*!< 0x00000010 */
12802 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos)/*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h15618 #define RCC_CCIPR1_USART3SEL_Pos (4U) macro
15619 #define RCC_CCIPR1_USART3SEL_Msk (0x3UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000003…
15621 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000001…
15622 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000002…
Dstm32u535xx.h15069 #define RCC_CCIPR1_USART3SEL_Pos (4U) macro
15070 #define RCC_CCIPR1_USART3SEL_Msk (0x3UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000003…
15072 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000001…
15073 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000002…
Dstm32u575xx.h16578 #define RCC_CCIPR1_USART3SEL_Pos (4U) macro
16579 #define RCC_CCIPR1_USART3SEL_Msk (0x3UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000003…
16581 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000001…
16582 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000002…
Dstm32u585xx.h17185 #define RCC_CCIPR1_USART3SEL_Pos (4U) macro
17186 #define RCC_CCIPR1_USART3SEL_Msk (0x3UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000003…
17188 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000001…
17189 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000002…
Dstm32u595xx.h17663 #define RCC_CCIPR1_USART3SEL_Pos (4U) macro
17664 #define RCC_CCIPR1_USART3SEL_Msk (0x3UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000003…
17666 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000001…
17667 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000002…
Dstm32u5a5xx.h18270 #define RCC_CCIPR1_USART3SEL_Pos (4U) macro
18271 #define RCC_CCIPR1_USART3SEL_Msk (0x3UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000003…
18273 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000001…
18274 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000002…
Dstm32u5f7xx.h19253 #define RCC_CCIPR1_USART3SEL_Pos (4U) macro
19254 #define RCC_CCIPR1_USART3SEL_Msk (0x3UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000003…
19256 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000001…
19257 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000002…
Dstm32u599xx.h21431 #define RCC_CCIPR1_USART3SEL_Pos (4U) macro
21432 #define RCC_CCIPR1_USART3SEL_Msk (0x3UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000003…
21434 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000001…
21435 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000002…
Dstm32u5g7xx.h19860 #define RCC_CCIPR1_USART3SEL_Pos (4U) macro
19861 #define RCC_CCIPR1_USART3SEL_Msk (0x3UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000003…
19863 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000001…
19864 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000002…
Dstm32u5f9xx.h22391 #define RCC_CCIPR1_USART3SEL_Pos (4U) macro
22392 #define RCC_CCIPR1_USART3SEL_Msk (0x3UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000003…
22394 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000001…
22395 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000002…
Dstm32u5a9xx.h22038 #define RCC_CCIPR1_USART3SEL_Pos (4U) macro
22039 #define RCC_CCIPR1_USART3SEL_Msk (0x3UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000003…
22041 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000001…
22042 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000002…
Dstm32u5g9xx.h22998 #define RCC_CCIPR1_USART3SEL_Pos (4U) macro
22999 #define RCC_CCIPR1_USART3SEL_Msk (0x3UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000003…
23001 #define RCC_CCIPR1_USART3SEL_0 (0x1UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000001…
23002 #define RCC_CCIPR1_USART3SEL_1 (0x2UL << RCC_CCIPR1_USART3SEL_Pos) /*!< 0x0000002…