Searched refs:RCC_CCIPR1_I2C4SEL_Pos (Results 1 – 13 of 13) sorted by relevance
539 #define LL_RCC_I2C4_CLKSOURCE_PCLK1 ((RCC_OFFSET_CCIPR1 << 24U) | (RCC_CCIPR1_I2C4SEL_Pos <…540 #define LL_RCC_I2C4_CLKSOURCE_SYSCLK ((RCC_OFFSET_CCIPR1 << 24U) | (RCC_CCIPR1_I2C4SEL_Pos <…541 … (RCC_CCIPR1_I2C4SEL_0 >> RCC_CCIPR1_I2C4SEL_Pos)) /*!< SYSCLK clock used as I2C4 clock source */542 #define LL_RCC_I2C4_CLKSOURCE_HSI ((RCC_OFFSET_CCIPR1 << 24U) | (RCC_CCIPR1_I2C4SEL_Pos <…543 … (RCC_CCIPR1_I2C4SEL_1 >> RCC_CCIPR1_I2C4SEL_Pos)) /*!< HSI clock used as I2C4 clock source */544 #define LL_RCC_I2C4_CLKSOURCE_MSIK ((RCC_OFFSET_CCIPR1 << 24U) | (RCC_CCIPR1_I2C4SEL_Pos <…545 … (RCC_CCIPR1_I2C4SEL >> RCC_CCIPR1_I2C4SEL_Pos)) /*!< MSIK clock used as I2C4 clock source */885 #define LL_RCC_I2C4_CLKSOURCE ((RCC_OFFSET_CCIPR1 << 24U) | (RCC_CCIPR1_I2C4SEL_Pos << …886 … (RCC_CCIPR1_I2C4SEL >> RCC_CCIPR1_I2C4SEL_Pos)) /*!< I2C4 Clock source selection */
15643 #define RCC_CCIPR1_I2C4SEL_Pos (14U) macro15644 #define RCC_CCIPR1_I2C4SEL_Msk (0x3UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000C00…15646 #define RCC_CCIPR1_I2C4SEL_0 (0x1UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000400…15647 #define RCC_CCIPR1_I2C4SEL_1 (0x2UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000800…
15094 #define RCC_CCIPR1_I2C4SEL_Pos (14U) macro15095 #define RCC_CCIPR1_I2C4SEL_Msk (0x3UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000C00…15097 #define RCC_CCIPR1_I2C4SEL_0 (0x1UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000400…15098 #define RCC_CCIPR1_I2C4SEL_1 (0x2UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000800…
16603 #define RCC_CCIPR1_I2C4SEL_Pos (14U) macro16604 #define RCC_CCIPR1_I2C4SEL_Msk (0x3UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000C00…16606 #define RCC_CCIPR1_I2C4SEL_0 (0x1UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000400…16607 #define RCC_CCIPR1_I2C4SEL_1 (0x2UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000800…
17210 #define RCC_CCIPR1_I2C4SEL_Pos (14U) macro17211 #define RCC_CCIPR1_I2C4SEL_Msk (0x3UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000C00…17213 #define RCC_CCIPR1_I2C4SEL_0 (0x1UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000400…17214 #define RCC_CCIPR1_I2C4SEL_1 (0x2UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000800…
17688 #define RCC_CCIPR1_I2C4SEL_Pos (14U) macro17689 #define RCC_CCIPR1_I2C4SEL_Msk (0x3UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000C00…17691 #define RCC_CCIPR1_I2C4SEL_0 (0x1UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000400…17692 #define RCC_CCIPR1_I2C4SEL_1 (0x2UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000800…
18295 #define RCC_CCIPR1_I2C4SEL_Pos (14U) macro18296 #define RCC_CCIPR1_I2C4SEL_Msk (0x3UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000C00…18298 #define RCC_CCIPR1_I2C4SEL_0 (0x1UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000400…18299 #define RCC_CCIPR1_I2C4SEL_1 (0x2UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000800…
19278 #define RCC_CCIPR1_I2C4SEL_Pos (14U) macro19279 #define RCC_CCIPR1_I2C4SEL_Msk (0x3UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000C00…19281 #define RCC_CCIPR1_I2C4SEL_0 (0x1UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000400…19282 #define RCC_CCIPR1_I2C4SEL_1 (0x2UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000800…
21456 #define RCC_CCIPR1_I2C4SEL_Pos (14U) macro21457 #define RCC_CCIPR1_I2C4SEL_Msk (0x3UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000C00…21459 #define RCC_CCIPR1_I2C4SEL_0 (0x1UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000400…21460 #define RCC_CCIPR1_I2C4SEL_1 (0x2UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000800…
19885 #define RCC_CCIPR1_I2C4SEL_Pos (14U) macro19886 #define RCC_CCIPR1_I2C4SEL_Msk (0x3UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000C00…19888 #define RCC_CCIPR1_I2C4SEL_0 (0x1UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000400…19889 #define RCC_CCIPR1_I2C4SEL_1 (0x2UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000800…
22416 #define RCC_CCIPR1_I2C4SEL_Pos (14U) macro22417 #define RCC_CCIPR1_I2C4SEL_Msk (0x3UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000C00…22419 #define RCC_CCIPR1_I2C4SEL_0 (0x1UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000400…22420 #define RCC_CCIPR1_I2C4SEL_1 (0x2UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000800…
22063 #define RCC_CCIPR1_I2C4SEL_Pos (14U) macro22064 #define RCC_CCIPR1_I2C4SEL_Msk (0x3UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000C00…22066 #define RCC_CCIPR1_I2C4SEL_0 (0x1UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000400…22067 #define RCC_CCIPR1_I2C4SEL_1 (0x2UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000800…
23023 #define RCC_CCIPR1_I2C4SEL_Pos (14U) macro23024 #define RCC_CCIPR1_I2C4SEL_Msk (0x3UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000C00…23026 #define RCC_CCIPR1_I2C4SEL_0 (0x1UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000400…23027 #define RCC_CCIPR1_I2C4SEL_1 (0x2UL << RCC_CCIPR1_I2C4SEL_Pos) /*!< 0x0000800…
