Searched refs:RCC_CCIPR1_I2C2SEL_Pos (Results 1 – 16 of 16) sorted by relevance
525 #define LL_RCC_I2C2_CLKSOURCE_PCLK1 ((RCC_OFFSET_CCIPR1 << 24U) | (RCC_CCIPR1_I2C2SEL_Pos <…526 #define LL_RCC_I2C2_CLKSOURCE_SYSCLK ((RCC_OFFSET_CCIPR1 << 24U) | (RCC_CCIPR1_I2C2SEL_Pos <…527 … (RCC_CCIPR1_I2C2SEL_0 >> RCC_CCIPR1_I2C2SEL_Pos)) /*!< SYSCLK clock used as I2C2 clock source */528 #define LL_RCC_I2C2_CLKSOURCE_HSI ((RCC_OFFSET_CCIPR1 << 24U) | (RCC_CCIPR1_I2C2SEL_Pos <…529 … (RCC_CCIPR1_I2C2SEL_1 >> RCC_CCIPR1_I2C2SEL_Pos)) /*!< HSI clock used as I2C2 clock source */530 #define LL_RCC_I2C2_CLKSOURCE_MSIK ((RCC_OFFSET_CCIPR1 << 24U) | (RCC_CCIPR1_I2C2SEL_Pos <…531 … (RCC_CCIPR1_I2C2SEL >> RCC_CCIPR1_I2C2SEL_Pos)) /*!< MSIK clock used as I2C2 clock source */881 #define LL_RCC_I2C2_CLKSOURCE ((RCC_OFFSET_CCIPR1 << 24U) | (RCC_CCIPR1_I2C2SEL_Pos << …882 … (RCC_CCIPR1_I2C2SEL >> RCC_CCIPR1_I2C2SEL_Pos)) /*!< I2C2 Clock source selection */
420 …_PCLK1 (((uint32_t)RCC_OFFSET_CCIPR1 << 24U) | ((uint32_t)RCC_CCIPR1_I2C2SEL_Pos << 16U)) …421 …_OFFSET_CCIPR1 << 24U) | ((uint32_t)RCC_CCIPR1_I2C2SEL_Pos << 16U) | (RCC_CCIPR1_I2C2SEL_0 >> RCC_…422 …_OFFSET_CCIPR1 << 24U) | ((uint32_t)RCC_CCIPR1_I2C2SEL_Pos << 16U) | (RCC_CCIPR1_I2C2SEL_1 >> RCC_…591 …C_OFFSET_CCIPR1 << 24U) | ((uint32_t)RCC_CCIPR1_I2C2SEL_Pos << 16U) | (RCC_CCIPR1_I2C2SEL >> RCC_C…
12098 #define RCC_CCIPR1_I2C2SEL_Pos (14U) macro12099 #define RCC_CCIPR1_I2C2SEL_Msk (0x3UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000C000 */12101 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x00004000 */12102 #define RCC_CCIPR1_I2C2SEL_1 (0x2UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x00008000 */
12828 #define RCC_CCIPR1_I2C2SEL_Pos (14U) macro12829 #define RCC_CCIPR1_I2C2SEL_Msk (0x3UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000C000 */12831 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x00004000 */12832 #define RCC_CCIPR1_I2C2SEL_1 (0x2UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x00008000 */
15638 #define RCC_CCIPR1_I2C2SEL_Pos (12U) macro15639 #define RCC_CCIPR1_I2C2SEL_Msk (0x3UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000300…15641 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100…15642 #define RCC_CCIPR1_I2C2SEL_1 (0x2UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000200…
15089 #define RCC_CCIPR1_I2C2SEL_Pos (12U) macro15090 #define RCC_CCIPR1_I2C2SEL_Msk (0x3UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000300…15092 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100…15093 #define RCC_CCIPR1_I2C2SEL_1 (0x2UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000200…
16598 #define RCC_CCIPR1_I2C2SEL_Pos (12U) macro16599 #define RCC_CCIPR1_I2C2SEL_Msk (0x3UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000300…16601 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100…16602 #define RCC_CCIPR1_I2C2SEL_1 (0x2UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000200…
17205 #define RCC_CCIPR1_I2C2SEL_Pos (12U) macro17206 #define RCC_CCIPR1_I2C2SEL_Msk (0x3UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000300…17208 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100…17209 #define RCC_CCIPR1_I2C2SEL_1 (0x2UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000200…
17683 #define RCC_CCIPR1_I2C2SEL_Pos (12U) macro17684 #define RCC_CCIPR1_I2C2SEL_Msk (0x3UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000300…17686 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100…17687 #define RCC_CCIPR1_I2C2SEL_1 (0x2UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000200…
18290 #define RCC_CCIPR1_I2C2SEL_Pos (12U) macro18291 #define RCC_CCIPR1_I2C2SEL_Msk (0x3UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000300…18293 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100…18294 #define RCC_CCIPR1_I2C2SEL_1 (0x2UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000200…
19273 #define RCC_CCIPR1_I2C2SEL_Pos (12U) macro19274 #define RCC_CCIPR1_I2C2SEL_Msk (0x3UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000300…19276 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100…19277 #define RCC_CCIPR1_I2C2SEL_1 (0x2UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000200…
21451 #define RCC_CCIPR1_I2C2SEL_Pos (12U) macro21452 #define RCC_CCIPR1_I2C2SEL_Msk (0x3UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000300…21454 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100…21455 #define RCC_CCIPR1_I2C2SEL_1 (0x2UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000200…
19880 #define RCC_CCIPR1_I2C2SEL_Pos (12U) macro19881 #define RCC_CCIPR1_I2C2SEL_Msk (0x3UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000300…19883 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100…19884 #define RCC_CCIPR1_I2C2SEL_1 (0x2UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000200…
22411 #define RCC_CCIPR1_I2C2SEL_Pos (12U) macro22412 #define RCC_CCIPR1_I2C2SEL_Msk (0x3UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000300…22414 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100…22415 #define RCC_CCIPR1_I2C2SEL_1 (0x2UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000200…
22058 #define RCC_CCIPR1_I2C2SEL_Pos (12U) macro22059 #define RCC_CCIPR1_I2C2SEL_Msk (0x3UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000300…22061 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100…22062 #define RCC_CCIPR1_I2C2SEL_1 (0x2UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000200…
23018 #define RCC_CCIPR1_I2C2SEL_Pos (12U) macro23019 #define RCC_CCIPR1_I2C2SEL_Msk (0x3UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000300…23021 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100…23022 #define RCC_CCIPR1_I2C2SEL_1 (0x2UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000200…
