Searched refs:RCC_CCIPR1_I2C2SEL_0 (Results 1 – 18 of 18) sorted by relevance
645 #define RCC_I2C2CLKSOURCE_SYSCLK RCC_CCIPR1_I2C2SEL_0647 #define RCC_I2C2CLKSOURCE_MSIK (RCC_CCIPR1_I2C2SEL_1 | RCC_CCIPR1_I2C2SEL_0)
527 … (RCC_CCIPR1_I2C2SEL_0 >> RCC_CCIPR1_I2C2SEL_Pos)) /*!< SYSCLK clock used as I2C2 clock source */
368 #define RCC_I2C2CLKSOURCE_SYSCLK RCC_CCIPR1_I2C2SEL_0 /*!< System clock */
421 …SET_CCIPR1 << 24U) | ((uint32_t)RCC_CCIPR1_I2C2SEL_Pos << 16U) | (RCC_CCIPR1_I2C2SEL_0 >> RCC_CCIP…
12101 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x00004000 */ macro
12831 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x00004000 */ macro
15641 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100… macro
15092 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100… macro
16601 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100… macro
17208 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100… macro
17686 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100… macro
18293 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100… macro
19276 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100… macro
21454 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100… macro
19883 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100… macro
22414 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100… macro
22061 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100… macro
23021 #define RCC_CCIPR1_I2C2SEL_0 (0x1UL << RCC_CCIPR1_I2C2SEL_Pos) /*!< 0x0000100… macro
