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Searched refs:RCC_CCIPR1_I2C1SEL_1 (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc_ex.h635 #define RCC_I2C1CLKSOURCE_HSI RCC_CCIPR1_I2C1SEL_1
636 #define RCC_I2C1CLKSOURCE_MSIK (RCC_CCIPR1_I2C1SEL_1 | RCC_CCIPR1_I2C1SEL_0)
Dstm32u5xx_ll_rcc.h522 … (RCC_CCIPR1_I2C1SEL_1 >> RCC_CCIPR1_I2C1SEL_Pos)) /*!< HSI clock used as I2C1 clock source */
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc_ex.h225 #define RCC_I2C1CLKSOURCE_HSI RCC_CCIPR1_I2C1SEL_1
Dstm32wbaxx_ll_rcc.h435 … ((RCC_OFFSET_CCIPR1 << 24U) | (RCC_CCIPR1_I2C1SEL_Pos << 16U) | (RCC_CCIPR1_I2C1SEL_1 >> RCC_CCIP…
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc_ex.h359 #define RCC_I2C1CLKSOURCE_HSI RCC_CCIPR1_I2C1SEL_1 /*!< HSI */
Dstm32l5xx_ll_rcc.h419 …SET_CCIPR1 << 24U) | ((uint32_t)RCC_CCIPR1_I2C1SEL_Pos << 16U) | (RCC_CCIPR1_I2C1SEL_1 >> RCC_CCIP…
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba52xx.h10289 #define RCC_CCIPR1_I2C1SEL_1 (0x2UL << RCC_CCIPR1_I2C1SEL_Pos) /*!< 0x00000800… macro
Dstm32wba54xx.h10597 #define RCC_CCIPR1_I2C1SEL_1 (0x2UL << RCC_CCIPR1_I2C1SEL_Pos) /*!< 0x00000800… macro
Dstm32wba5mxx.h10615 #define RCC_CCIPR1_I2C1SEL_1 (0x2UL << RCC_CCIPR1_I2C1SEL_Pos) /*!< 0x00000800… macro
Dstm32wba55xx.h10615 #define RCC_CCIPR1_I2C1SEL_1 (0x2UL << RCC_CCIPR1_I2C1SEL_Pos) /*!< 0x00000800… macro
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h12096 #define RCC_CCIPR1_I2C1SEL_1 (0x2UL << RCC_CCIPR1_I2C1SEL_Pos) /*!< 0x00002000 */ macro
Dstm32l562xx.h12826 #define RCC_CCIPR1_I2C1SEL_1 (0x2UL << RCC_CCIPR1_I2C1SEL_Pos) /*!< 0x00002000 */ macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h15637 #define RCC_CCIPR1_I2C1SEL_1 (0x2UL << RCC_CCIPR1_I2C1SEL_Pos) /*!< 0x0000080… macro
Dstm32u535xx.h15088 #define RCC_CCIPR1_I2C1SEL_1 (0x2UL << RCC_CCIPR1_I2C1SEL_Pos) /*!< 0x0000080… macro
Dstm32u575xx.h16597 #define RCC_CCIPR1_I2C1SEL_1 (0x2UL << RCC_CCIPR1_I2C1SEL_Pos) /*!< 0x0000080… macro
Dstm32u585xx.h17204 #define RCC_CCIPR1_I2C1SEL_1 (0x2UL << RCC_CCIPR1_I2C1SEL_Pos) /*!< 0x0000080… macro
Dstm32u595xx.h17682 #define RCC_CCIPR1_I2C1SEL_1 (0x2UL << RCC_CCIPR1_I2C1SEL_Pos) /*!< 0x0000080… macro
Dstm32u5a5xx.h18289 #define RCC_CCIPR1_I2C1SEL_1 (0x2UL << RCC_CCIPR1_I2C1SEL_Pos) /*!< 0x0000080… macro
Dstm32u5f7xx.h19272 #define RCC_CCIPR1_I2C1SEL_1 (0x2UL << RCC_CCIPR1_I2C1SEL_Pos) /*!< 0x0000080… macro
Dstm32u599xx.h21450 #define RCC_CCIPR1_I2C1SEL_1 (0x2UL << RCC_CCIPR1_I2C1SEL_Pos) /*!< 0x0000080… macro
Dstm32u5g7xx.h19879 #define RCC_CCIPR1_I2C1SEL_1 (0x2UL << RCC_CCIPR1_I2C1SEL_Pos) /*!< 0x0000080… macro
Dstm32u5f9xx.h22410 #define RCC_CCIPR1_I2C1SEL_1 (0x2UL << RCC_CCIPR1_I2C1SEL_Pos) /*!< 0x0000080… macro
Dstm32u5a9xx.h22057 #define RCC_CCIPR1_I2C1SEL_1 (0x2UL << RCC_CCIPR1_I2C1SEL_Pos) /*!< 0x0000080… macro
Dstm32u5g9xx.h23017 #define RCC_CCIPR1_I2C1SEL_1 (0x2UL << RCC_CCIPR1_I2C1SEL_Pos) /*!< 0x0000080… macro