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Searched refs:RCC_APBSMENR1_LPTIM1SMEN (Results 1 – 13 of 13) sorted by relevance

/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h2071 #define __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR1, RCC_APBSMENR1_LPTIM1SMEN)
2135 #define __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APBSMENR1, RCC_APBSMENR1_LPTIM1SMEN)
2330 …_RCC_LPTIM1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APBSMENR1, RCC_APBSMENR1_LPTIM1SMEN) != RESET)
2402 …_RCC_LPTIM1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APBSMENR1, RCC_APBSMENR1_LPTIM1SMEN) == RESET)
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc.h1898 …efine __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR1, RCC_APBSMENR1_LPTIM1SMEN)
1961 …ne __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APBSMENR1, RCC_APBSMENR1_LPTIM1SMEN)
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g031xx.h4653 #define RCC_APBSMENR1_LPTIM1SMEN RCC_APBSMENR1_LPTIM1SMEN_Msk macro
Dstm32g041xx.h4907 #define RCC_APBSMENR1_LPTIM1SMEN RCC_APBSMENR1_LPTIM1SMEN_Msk macro
Dstm32g051xx.h5022 #define RCC_APBSMENR1_LPTIM1SMEN RCC_APBSMENR1_LPTIM1SMEN_Msk macro
Dstm32g061xx.h5276 #define RCC_APBSMENR1_LPTIM1SMEN RCC_APBSMENR1_LPTIM1SMEN_Msk macro
Dstm32g071xx.h5402 #define RCC_APBSMENR1_LPTIM1SMEN RCC_APBSMENR1_LPTIM1SMEN_Msk macro
Dstm32g081xx.h5656 #define RCC_APBSMENR1_LPTIM1SMEN RCC_APBSMENR1_LPTIM1SMEN_Msk macro
Dstm32g0c1xx.h7047 #define RCC_APBSMENR1_LPTIM1SMEN RCC_APBSMENR1_LPTIM1SMEN_Msk macro
Dstm32g0b1xx.h6793 #define RCC_APBSMENR1_LPTIM1SMEN RCC_APBSMENR1_LPTIM1SMEN_Msk macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h5548 #define RCC_APBSMENR1_LPTIM1SMEN RCC_APBSMENR1_LPTIM1SMEN_Msk macro
Dstm32u083xx.h6412 #define RCC_APBSMENR1_LPTIM1SMEN RCC_APBSMENR1_LPTIM1SMEN_Msk macro
Dstm32u073xx.h6145 #define RCC_APBSMENR1_LPTIM1SMEN RCC_APBSMENR1_LPTIM1SMEN_Msk macro