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Searched refs:RCC_APBENR1_LPTIM2EN (Results 1 – 15 of 15) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc.h1059 SET_BIT(RCC->APBENR1, RCC_APBENR1_LPTIM2EN); \
1061 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_LPTIM2EN); \
1129 #define __HAL_RCC_LPTIM2_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_LPTIM2EN)
1340 #define __HAL_RCC_LPTIM2_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_LPTIM2EN) !=…
1402 #define __HAL_RCC_LPTIM2_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_LPTIM2EN) ==…
Dstm32u0xx_ll_bus.h134 #define LL_APB1_GRP1_PERIPH_LPTIM2 RCC_APBENR1_LPTIM2EN
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h1265 SET_BIT(RCC->APBENR1, RCC_APBENR1_LPTIM2EN); \
1267 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_LPTIM2EN); \
1437 #define __HAL_RCC_LPTIM2_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_LPTIM2EN)
1589 #define __HAL_RCC_LPTIM2_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_LPTIM2EN) != 0U)
1653 #define __HAL_RCC_LPTIM2_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_LPTIM2EN) == 0U)
Dstm32g0xx_ll_bus.h166 #define LL_APB1_GRP1_PERIPH_LPTIM2 RCC_APBENR1_LPTIM2EN
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g031xx.h4552 #define RCC_APBENR1_LPTIM2EN RCC_APBENR1_LPTIM2EN_Msk macro
Dstm32g041xx.h4800 #define RCC_APBENR1_LPTIM2EN RCC_APBENR1_LPTIM2EN_Msk macro
Dstm32g051xx.h4909 #define RCC_APBENR1_LPTIM2EN RCC_APBENR1_LPTIM2EN_Msk macro
Dstm32g061xx.h5157 #define RCC_APBENR1_LPTIM2EN RCC_APBENR1_LPTIM2EN_Msk macro
Dstm32g071xx.h5274 #define RCC_APBENR1_LPTIM2EN RCC_APBENR1_LPTIM2EN_Msk macro
Dstm32g081xx.h5522 #define RCC_APBENR1_LPTIM2EN RCC_APBENR1_LPTIM2EN_Msk macro
Dstm32g0c1xx.h6880 #define RCC_APBENR1_LPTIM2EN RCC_APBENR1_LPTIM2EN_Msk macro
Dstm32g0b1xx.h6632 #define RCC_APBENR1_LPTIM2EN RCC_APBENR1_LPTIM2EN_Msk macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h5423 #define RCC_APBENR1_LPTIM2EN RCC_APBENR1_LPTIM2EN_Msk macro
Dstm32u083xx.h6257 #define RCC_APBENR1_LPTIM2EN RCC_APBENR1_LPTIM2EN_Msk macro
Dstm32u073xx.h5993 #define RCC_APBENR1_LPTIM2EN RCC_APBENR1_LPTIM2EN_Msk macro