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Searched refs:RCC_APBENR1_I2C3EN (Results 1 – 10 of 10) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc.h1010 SET_BIT(RCC->APBENR1, RCC_APBENR1_I2C3EN); \
1012 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C3EN); \
1116 #define __HAL_RCC_I2C3_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_I2C3EN)
1326 #define __HAL_RCC_I2C3_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C3EN) != 0…
1388 #define __HAL_RCC_I2C3_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C3EN) == 0…
Dstm32u0xx_ll_bus.h126 #define LL_APB1_GRP1_PERIPH_I2C3 RCC_APBENR1_I2C3EN
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h1179 SET_BIT(RCC->APBENR1, RCC_APBENR1_I2C3EN); \
1181 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C3EN); \
1411 #define __HAL_RCC_I2C3_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_I2C3EN)
1572 #define __HAL_RCC_I2C3_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C3EN) != 0U)
1636 #define __HAL_RCC_I2C3_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C3EN) == 0U)
Dstm32g0xx_ll_bus.h149 #define LL_APB1_GRP1_PERIPH_I2C3 RCC_APBENR1_I2C3EN
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g0b0xx.h5559 #define RCC_APBENR1_I2C3EN RCC_APBENR1_I2C3EN_Msk macro
Dstm32g0c1xx.h6859 #define RCC_APBENR1_I2C3EN RCC_APBENR1_I2C3EN_Msk macro
Dstm32g0b1xx.h6611 #define RCC_APBENR1_I2C3EN RCC_APBENR1_I2C3EN_Msk macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h5411 #define RCC_APBENR1_I2C3EN RCC_APBENR1_I2C3EN_Msk macro
Dstm32u083xx.h6239 #define RCC_APBENR1_I2C3EN RCC_APBENR1_I2C3EN_Msk macro
Dstm32u073xx.h5975 #define RCC_APBENR1_I2C3EN RCC_APBENR1_I2C3EN_Msk macro