Searched refs:RCC_APB2ENR_HRTIM1EN (Results 1 – 8 of 8) sorted by relevance
2341 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_HRTIM1EN);\2343 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_HRTIM1EN);\2347 #define __HAL_RCC_HRTIM1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_HRTIM1EN))2651 #define __HAL_RCC_HRTIM1_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_HRTIM1EN)) != RESET)2653 #define __HAL_RCC_HRTIM1_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_HRTIM1EN)) == RESET)
212 #define LL_APB2_GRP1_PERIPH_HRTIM1 RCC_APB2ENR_HRTIM1EN
1194 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_HRTIM1EN); \1196 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_HRTIM1EN); \1228 #define __HAL_RCC_HRTIM1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_HRTIM1EN)1561 #define __HAL_RCC_HRTIM1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_HRTIM1EN) != 0U)1592 #define __HAL_RCC_HRTIM1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_HRTIM1EN) == 0U)
204 #define LL_APB2_GRP1_PERIPH_HRTIM1 RCC_APB2ENR_HRTIM1EN
11785 #define RCC_APB2ENR_HRTIM1EN RCC_APB2ENR_HRTIM1EN_Msk /*!< HRTIM1 reset */ macro
11741 #define RCC_APB2ENR_HRTIM1EN RCC_APB2ENR_HRTIM1EN_Msk macro
12502 #define RCC_APB2ENR_HRTIM1EN RCC_APB2ENR_HRTIM1EN_Msk macro
12729 #define RCC_APB2ENR_HRTIM1EN RCC_APB2ENR_HRTIM1EN_Msk macro
