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Searched refs:RCC_APB2ENR_ADCEN_Pos (Results 1 – 25 of 43) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h3084 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3085 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32f030x8.h3113 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3114 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32f070x6.h3149 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3150 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32f031x6.h3210 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3211 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32f030xc.h3403 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3404 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32f038xx.h3185 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3186 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32f070xb.h3262 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3263 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32f058xx.h3645 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3646 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32f051x8.h3670 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3671 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32f071xb.h4110 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
4111 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h3777 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3778 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32l010x8.h3476 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3477 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32l010xb.h3498 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3499 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32l011xx.h3549 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3550 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32l021xx.h3683 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3684 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32l031xx.h3643 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3644 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32l051xx.h3735 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3736 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32l010x4.h3440 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3441 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32l010x6.h3469 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3470 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32l081xx.h3944 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3945 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32l071xx.h3810 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
3811 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32l052xx.h4066 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
4067 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32l062xx.h4200 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
4201 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32l053xx.h4213 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
4214 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */
Dstm32l072xx.h4245 #define RCC_APB2ENR_ADCEN_Pos (9U) macro
4246 #define RCC_APB2ENR_ADCEN_Msk (0x1UL << RCC_APB2ENR_ADCEN_Pos) /*!< 0x00000200 */

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