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Searched refs:RCC_APB1ENR_TIM13EN (Results 1 – 25 of 50) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_hal_rcc_ex.h970 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
972 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
1010 #define __HAL_RCC_TIM13_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM13EN))
1040 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
1042 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
1055 #define __HAL_RCC_TIM13_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM13EN))
1126 #define __HAL_RCC_TIM13_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) != RESET)
1127 #define __HAL_RCC_TIM13_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) == RESET)
1144 #define __HAL_RCC_TIM13_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) != RESET)
1145 #define __HAL_RCC_TIM13_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) == RESET)
Dstm32f1xx_ll_bus.h133 #define LL_APB1_GRP1_PERIPH_TIM13 RCC_APB1ENR_TIM13EN
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_rcc_ex.h1337 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
1339 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
1455 #define __HAL_RCC_TIM13_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM13EN))
1484 #define __HAL_RCC_TIM13_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) != RESET)
1503 #define __HAL_RCC_TIM13_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) == RESET)
2373 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
2375 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
2470 #define __HAL_RCC_TIM13_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM13EN))
2497 #define __HAL_RCC_TIM13_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) != RESET)
2514 #define __HAL_RCC_TIM13_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) == RESET)
[all …]
Dstm32f4xx_ll_bus.h205 #define LL_APB1_GRP1_PERIPH_TIM13 RCC_APB1ENR_TIM13EN
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_rcc.h705 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
707 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
823 #define __HAL_RCC_TIM13_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM13EN))
857 #define __HAL_RCC_TIM13_IS_CLK_ENABLED() ((RCC->APB1ENR &(RCC_APB1ENR_TIM13EN))!= RESET)
881 #define __HAL_RCC_TIM13_IS_CLK_DISABLED() ((RCC->APB1ENR &(RCC_APB1ENR_TIM13EN))== RESET)
Dstm32f2xx_ll_bus.h137 #define LL_APB1_GRP1_PERIPH_TIM13 RCC_APB1ENR_TIM13EN
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal_rcc_ex.h2159 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
2161 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
2218 #define __HAL_RCC_TIM13_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM13EN))
2559 #define __HAL_RCC_TIM13_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) != RESET)
2572 #define __HAL_RCC_TIM13_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) == RESET)
Dstm32f3xx_ll_bus.h133 #define LL_APB1_GRP1_PERIPH_TIM13 RCC_APB1ENR_TIM13EN
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc_ex.h975 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
977 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
1167 #define __HAL_RCC_TIM13_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM13EN))
1590 #define __HAL_RCC_TIM13_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) != RESET)
1617 #define __HAL_RCC_TIM13_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) == RESET)
Dstm32f7xx_ll_bus.h155 #define LL_APB1_GRP1_PERIPH_TIM13 RCC_APB1ENR_TIM13EN
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f100xe.h1645 #define RCC_APB1ENR_TIM13EN RCC_APB1ENR_TIM13EN_Msk /*!< TIM13 Timer clo… macro
Dstm32f101xg.h1675 #define RCC_APB1ENR_TIM13EN RCC_APB1ENR_TIM13EN_Msk /*!< TIM13 Timer clo… macro
Dstm32f103xg.h1860 #define RCC_APB1ENR_TIM13EN RCC_APB1ENR_TIM13EN_Msk /*!< TIM13 Timer clo… macro
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f378xx.h7971 #define RCC_APB1ENR_TIM13EN RCC_APB1ENR_TIM13EN_Msk /*!< Timer 13 clock … macro
Dstm32f373xc.h8064 #define RCC_APB1ENR_TIM13EN RCC_APB1ENR_TIM13EN_Msk /*!< Timer 13 clock … macro
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h9520 #define RCC_APB1ENR_TIM13EN RCC_APB1ENR_TIM13EN_Msk macro
Dstm32f205xx.h9271 #define RCC_APB1ENR_TIM13EN RCC_APB1ENR_TIM13EN_Msk macro
Dstm32f207xx.h9591 #define RCC_APB1ENR_TIM13EN RCC_APB1ENR_TIM13EN_Msk macro
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f405xx.h9677 #define RCC_APB1ENR_TIM13EN RCC_APB1ENR_TIM13EN_Msk macro
Dstm32f412cx.h8778 #define RCC_APB1ENR_TIM13EN RCC_APB1ENR_TIM13EN_Msk macro
Dstm32f415xx.h9956 #define RCC_APB1ENR_TIM13EN RCC_APB1ENR_TIM13EN_Msk macro
Dstm32f423xx.h10065 #define RCC_APB1ENR_TIM13EN RCC_APB1ENR_TIM13EN_Msk macro
Dstm32f407xx.h9998 #define RCC_APB1ENR_TIM13EN RCC_APB1ENR_TIM13EN_Msk macro
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h9671 #define RCC_APB1ENR_TIM13EN RCC_APB1ENR_TIM13EN_Msk macro
Dstm32f722xx.h9652 #define RCC_APB1ENR_TIM13EN RCC_APB1ENR_TIM13EN_Msk macro

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