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Searched refs:RCC_APB1ENR_TIM12EN (Results 1 – 25 of 50) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_hal_rcc_ex.h962 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
964 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
1009 #define __HAL_RCC_TIM12_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM12EN))
1032 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
1034 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
1054 #define __HAL_RCC_TIM12_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM12EN))
1124 #define __HAL_RCC_TIM12_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) != RESET)
1125 #define __HAL_RCC_TIM12_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) == RESET)
1140 #define __HAL_RCC_TIM12_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) != RESET)
1141 #define __HAL_RCC_TIM12_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) == RESET)
Dstm32f1xx_ll_bus.h130 #define LL_APB1_GRP1_PERIPH_TIM12 RCC_APB1ENR_TIM12EN
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_rcc_ex.h1330 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
1332 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
1454 #define __HAL_RCC_TIM12_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM12EN))
1483 #define __HAL_RCC_TIM12_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) != RESET)
1502 #define __HAL_RCC_TIM12_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) == RESET)
2366 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
2368 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
2469 #define __HAL_RCC_TIM12_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM12EN))
2496 #define __HAL_RCC_TIM12_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) != RESET)
2513 #define __HAL_RCC_TIM12_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) == RESET)
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Dstm32f4xx_ll_bus.h202 #define LL_APB1_GRP1_PERIPH_TIM12 RCC_APB1ENR_TIM12EN
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_rcc.h698 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
700 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
822 #define __HAL_RCC_TIM12_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM12EN))
856 #define __HAL_RCC_TIM12_IS_CLK_ENABLED() ((RCC->APB1ENR &(RCC_APB1ENR_TIM12EN))!= RESET)
880 #define __HAL_RCC_TIM12_IS_CLK_DISABLED() ((RCC->APB1ENR &(RCC_APB1ENR_TIM12EN))== RESET)
Dstm32f2xx_ll_bus.h136 #define LL_APB1_GRP1_PERIPH_TIM12 RCC_APB1ENR_TIM12EN
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal_rcc_ex.h2152 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
2154 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
2217 #define __HAL_RCC_TIM12_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM12EN))
2558 #define __HAL_RCC_TIM12_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) != RESET)
2571 #define __HAL_RCC_TIM12_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) == RESET)
Dstm32f3xx_ll_bus.h130 #define LL_APB1_GRP1_PERIPH_TIM12 RCC_APB1ENR_TIM12EN
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc_ex.h967 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
969 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
1166 #define __HAL_RCC_TIM12_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM12EN))
1589 #define __HAL_RCC_TIM12_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) != RESET)
1616 #define __HAL_RCC_TIM12_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) == RESET)
Dstm32f7xx_ll_bus.h154 #define LL_APB1_GRP1_PERIPH_TIM12 RCC_APB1ENR_TIM12EN
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f100xe.h1642 #define RCC_APB1ENR_TIM12EN RCC_APB1ENR_TIM12EN_Msk /*!< TIM12 Timer clo… macro
Dstm32f101xg.h1672 #define RCC_APB1ENR_TIM12EN RCC_APB1ENR_TIM12EN_Msk /*!< TIM12 Timer clo… macro
Dstm32f103xg.h1857 #define RCC_APB1ENR_TIM12EN RCC_APB1ENR_TIM12EN_Msk /*!< TIM12 Timer clo… macro
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f378xx.h7968 #define RCC_APB1ENR_TIM12EN RCC_APB1ENR_TIM12EN_Msk /*!< Timer 12 clock … macro
Dstm32f373xc.h8061 #define RCC_APB1ENR_TIM12EN RCC_APB1ENR_TIM12EN_Msk /*!< Timer 12 clock … macro
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h9517 #define RCC_APB1ENR_TIM12EN RCC_APB1ENR_TIM12EN_Msk macro
Dstm32f205xx.h9268 #define RCC_APB1ENR_TIM12EN RCC_APB1ENR_TIM12EN_Msk macro
Dstm32f207xx.h9588 #define RCC_APB1ENR_TIM12EN RCC_APB1ENR_TIM12EN_Msk macro
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f405xx.h9674 #define RCC_APB1ENR_TIM12EN RCC_APB1ENR_TIM12EN_Msk macro
Dstm32f412cx.h8775 #define RCC_APB1ENR_TIM12EN RCC_APB1ENR_TIM12EN_Msk macro
Dstm32f415xx.h9953 #define RCC_APB1ENR_TIM12EN RCC_APB1ENR_TIM12EN_Msk macro
Dstm32f423xx.h10062 #define RCC_APB1ENR_TIM12EN RCC_APB1ENR_TIM12EN_Msk macro
Dstm32f407xx.h9995 #define RCC_APB1ENR_TIM12EN RCC_APB1ENR_TIM12EN_Msk macro
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h9668 #define RCC_APB1ENR_TIM12EN RCC_APB1ENR_TIM12EN_Msk macro
Dstm32f722xx.h9649 #define RCC_APB1ENR_TIM12EN RCC_APB1ENR_TIM12EN_Msk macro

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