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Searched refs:RCC_APB1ENR1_CRSEN (Results 1 – 25 of 59) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc.h869 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN); \
871 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN); \
1041 #define __HAL_RCC_CRS_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN);
1414 #define __HAL_RCC_CRS_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN) != 0U)
1474 #define __HAL_RCC_CRS_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN) == 0U)
Dstm32g4xx_ll_bus.h144 #define LL_APB1_GRP1_PERIPH_CRS RCC_APB1ENR1_CRSEN
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h1083 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN); \
1085 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN); \
1206 #define __HAL_RCC_CRS_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN);
1531 #define __HAL_RCC_CRS_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN) != 0U)
1588 #define __HAL_RCC_CRS_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN) == 0U)
Dstm32l5xx_ll_bus.h143 #define LL_APB1_GRP1_PERIPH_CRS RCC_APB1ENR1_CRSEN
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h1246 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN); \
1248 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN); \
1407 #define __HAL_RCC_CRS_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN);
1953 #define __HAL_RCC_CRS_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN) != 0U)
2052 #define __HAL_RCC_CRS_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN) == 0U)
Dstm32l4xx_ll_bus.h209 #define LL_APB1_GRP1_PERIPH_CRS RCC_APB1ENR1_CRSEN
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h1572 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN); \
1574 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN); \
1671 #define __HAL_RCC_CRS_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN)
2375 #define __HAL_RCC_CRS_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN) != 0U)
2427 #define __HAL_RCC_CRS_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN) == 0U)
Dstm32u5xx_ll_bus.h231 #define LL_APB1_GRP1_PERIPH_CRS RCC_APB1ENR1_CRSEN
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_bus.h149 #define LL_APB1_GRP1_PERIPH_CRS RCC_APB1ENR1_CRSEN
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h7612 #define RCC_APB1ENR1_CRSEN RCC_APB1ENR1_CRSEN_Msk macro
Dstm32g411xc.h7786 #define RCC_APB1ENR1_CRSEN RCC_APB1ENR1_CRSEN_Msk macro
Dstm32g441xx.h7990 #define RCC_APB1ENR1_CRSEN RCC_APB1ENR1_CRSEN_Msk macro
Dstm32gbk1cb.h7746 #define RCC_APB1ENR1_CRSEN RCC_APB1ENR1_CRSEN_Msk macro
Dstm32g431xx.h7763 #define RCC_APB1ENR1_CRSEN RCC_APB1ENR1_CRSEN_Msk macro
Dstm32g4a1xx.h8369 #define RCC_APB1ENR1_CRSEN RCC_APB1ENR1_CRSEN_Msk macro
Dstm32g491xx.h8142 #define RCC_APB1ENR1_CRSEN RCC_APB1ENR1_CRSEN_Msk macro
Dstm32g473xx.h8835 #define RCC_APB1ENR1_CRSEN RCC_APB1ENR1_CRSEN_Msk macro
Dstm32g471xx.h8297 #define RCC_APB1ENR1_CRSEN RCC_APB1ENR1_CRSEN_Msk macro
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h6164 #define RCC_APB1ENR1_CRSEN RCC_APB1ENR1_CRSEN_Msk macro
Dstm32l412xx.h5942 #define RCC_APB1ENR1_CRSEN RCC_APB1ENR1_CRSEN_Msk macro
Dstm32l433xx.h9930 #define RCC_APB1ENR1_CRSEN RCC_APB1ENR1_CRSEN_Msk macro
Dstm32l451xx.h10091 #define RCC_APB1ENR1_CRSEN RCC_APB1ENR1_CRSEN_Msk macro
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb35xx.h7713 #define RCC_APB1ENR1_CRSEN RCC_APB1ENR1_CRSEN_Msk macro
Dstm32wb55xx.h7928 #define RCC_APB1ENR1_CRSEN RCC_APB1ENR1_CRSEN_Msk macro
Dstm32wb5mxx.h7928 #define RCC_APB1ENR1_CRSEN RCC_APB1ENR1_CRSEN_Msk macro

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