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Searched refs:RCC_AHBENR_FLITFEN (Results 1 – 25 of 74) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_hal_rcc.h339 SET_BIT(RCC->AHBENR, RCC_AHBENR_FLITFEN);\
341 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FLITFEN);\
355 #define __HAL_RCC_FLITF_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_FLITFEN))
374 #define __HAL_RCC_FLITF_IS_CLK_ENABLED() ((RCC->AHBENR & (RCC_AHBENR_FLITFEN)) != RESET)
375 #define __HAL_RCC_FLITF_IS_CLK_DISABLED() ((RCC->AHBENR & (RCC_AHBENR_FLITFEN)) == RESET)
Dstm32f1xx_ll_bus.h86 #define LL_AHB1_GRP1_PERIPH_FLASH RCC_AHBENR_FLITFEN
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_hal_rcc.h671 SET_BIT(RCC->AHBENR, RCC_AHBENR_FLITFEN);\
673 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FLITFEN);\
684 #define __HAL_RCC_FLITF_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_FLITFEN))
703 #define __HAL_RCC_FLITF_IS_CLK_ENABLED() ((RCC->AHBENR & (RCC_AHBENR_FLITFEN)) != RESET)
711 #define __HAL_RCC_FLITF_IS_CLK_DISABLED() ((RCC->AHBENR & (RCC_AHBENR_FLITFEN)) == RESET)
Dstm32f0xx_ll_bus.h78 #define LL_AHB1_GRP1_PERIPH_FLASH RCC_AHBENR_FLITFEN
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal_rcc.h738 SET_BIT(RCC->AHBENR, RCC_AHBENR_FLITFEN);\
740 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FLITFEN);\
759 #define __HAL_RCC_FLITF_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_FLITFEN))
908 #define __HAL_RCC_FLITF_IS_CLK_ENABLED() ((RCC->AHBENR & (RCC_AHBENR_FLITFEN)) != RESET)
919 #define __HAL_RCC_FLITF_IS_CLK_DISABLED() ((RCC->AHBENR & (RCC_AHBENR_FLITFEN)) == RESET)
Dstm32f3xx_ll_bus.h78 #define LL_AHB1_GRP1_PERIPH_FLASH RCC_AHBENR_FLITFEN
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_hal_rcc.h685 SET_BIT(RCC->AHBENR, RCC_AHBENR_FLITFEN);\
687 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FLITFEN);\
705 #define __HAL_RCC_FLITF_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_FLITFEN))
1118 #define __HAL_RCC_FLITF_IS_CLK_ENABLED() ((RCC->AHBENR & (RCC_AHBENR_FLITFEN)) != 0U)
1126 #define __HAL_RCC_FLITF_IS_CLK_DISABLED() ((RCC->AHBENR & (RCC_AHBENR_FLITFEN)) == 0U)
Dstm32l1xx_ll_bus.h89 #define LL_AHB1_GRP1_PERIPH_FLASH RCC_AHBENR_FLITFEN
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h1112 #define RCC_AHBENR_FLITFEN RCC_AHBENR_FLITFEN_Msk /*!< FLITF clock ena… macro
Dstm32f101xb.h1142 #define RCC_AHBENR_FLITFEN RCC_AHBENR_FLITFEN_Msk /*!< FLITF clock ena… macro
Dstm32f100xb.h1223 #define RCC_AHBENR_FLITFEN RCC_AHBENR_FLITFEN_Msk /*!< FLITF clock ena… macro
Dstm32f102x6.h1158 #define RCC_AHBENR_FLITFEN RCC_AHBENR_FLITFEN_Msk /*!< FLITF clock ena… macro
Dstm32f100xe.h1519 #define RCC_AHBENR_FLITFEN RCC_AHBENR_FLITFEN_Msk /*!< FLITF clock ena… macro
Dstm32f101xg.h1541 #define RCC_AHBENR_FLITFEN RCC_AHBENR_FLITFEN_Msk /*!< FLITF clock ena… macro
Dstm32f101xe.h1498 #define RCC_AHBENR_FLITFEN RCC_AHBENR_FLITFEN_Msk /*!< FLITF clock ena… macro
Dstm32f102xb.h1183 #define RCC_AHBENR_FLITFEN RCC_AHBENR_FLITFEN_Msk /*!< FLITF clock ena… macro
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h3056 #define RCC_AHBENR_FLITFEN RCC_AHBENR_FLITFEN_Msk /*!< FLITF clock ena… macro
Dstm32f030x8.h3085 #define RCC_AHBENR_FLITFEN RCC_AHBENR_FLITFEN_Msk /*!< FLITF clock ena… macro
Dstm32f070x6.h3122 #define RCC_AHBENR_FLITFEN RCC_AHBENR_FLITFEN_Msk /*!< FLITF clock ena… macro
Dstm32f031x6.h3185 #define RCC_AHBENR_FLITFEN RCC_AHBENR_FLITFEN_Msk /*!< FLITF clock ena… macro
Dstm32f030xc.h3373 #define RCC_AHBENR_FLITFEN RCC_AHBENR_FLITFEN_Msk /*!< FLITF clock ena… macro
Dstm32f038xx.h3160 #define RCC_AHBENR_FLITFEN RCC_AHBENR_FLITFEN_Msk /*!< FLITF clock ena… macro
Dstm32f070xb.h3235 #define RCC_AHBENR_FLITFEN RCC_AHBENR_FLITFEN_Msk /*!< FLITF clock ena… macro
Dstm32f058xx.h3614 #define RCC_AHBENR_FLITFEN RCC_AHBENR_FLITFEN_Msk /*!< FLITF clock ena… macro
Dstm32f051x8.h3639 #define RCC_AHBENR_FLITFEN RCC_AHBENR_FLITFEN_Msk /*!< FLITF clock ena… macro

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