Searched refs:RCC_AHB3ENR_PWREN (Results 1 – 14 of 14) sorted by relevance
1374 SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_PWREN); \1376 … tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_PWREN); \1430 #define __HAL_RCC_PWR_CLK_DISABLE() CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_PWREN)2304 #define __HAL_RCC_PWR_IS_CLK_ENABLED() (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_PWREN) != 0U)2320 #define __HAL_RCC_PWR_IS_CLK_DISABLED() (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_PWREN) == 0U)
175 #define LL_AHB3_GRP1_PERIPH_PWR RCC_AHB3ENR_PWREN
15179 #define RCC_AHB3ENR_PWREN RCC_AHB3ENR_PWREN_Msk /*!< PWR Clock … macro
14642 #define RCC_AHB3ENR_PWREN RCC_AHB3ENR_PWREN_Msk /*!< PWR Clock … macro
16107 #define RCC_AHB3ENR_PWREN RCC_AHB3ENR_PWREN_Msk /*!< PWR Clock … macro
16699 #define RCC_AHB3ENR_PWREN RCC_AHB3ENR_PWREN_Msk /*!< PWR Clock … macro
17162 #define RCC_AHB3ENR_PWREN RCC_AHB3ENR_PWREN_Msk /*!< PWR Clock … macro
17754 #define RCC_AHB3ENR_PWREN RCC_AHB3ENR_PWREN_Msk /*!< PWR Clock … macro
18725 #define RCC_AHB3ENR_PWREN RCC_AHB3ENR_PWREN_Msk /*!< PWR Clock … macro
20909 #define RCC_AHB3ENR_PWREN RCC_AHB3ENR_PWREN_Msk /*!< PWR Clock … macro
19317 #define RCC_AHB3ENR_PWREN RCC_AHB3ENR_PWREN_Msk /*!< PWR Clock … macro
21857 #define RCC_AHB3ENR_PWREN RCC_AHB3ENR_PWREN_Msk /*!< PWR Clock … macro
21501 #define RCC_AHB3ENR_PWREN RCC_AHB3ENR_PWREN_Msk /*!< PWR Clock … macro
22449 #define RCC_AHB3ENR_PWREN RCC_AHB3ENR_PWREN_Msk /*!< PWR Clock … macro
