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Searched refs:RCC_AHB2ENR_GPIODEN (Results 1 – 25 of 55) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc.h624 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN); \
626 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN); \
733 #define __HAL_RCC_GPIOD_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN)
1289 #define __HAL_RCC_GPIOD_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN) != 0U)
1328 #define __HAL_RCC_GPIOD_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN) == 0U)
Dstm32g4xx_ll_bus.h92 #define LL_AHB2_GRP1_PERIPH_GPIOD RCC_AHB2ENR_GPIODEN
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h760 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN); \
762 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN); \
865 #define __HAL_RCC_GPIOD_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN)
1413 #define __HAL_RCC_GPIOD_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN) != 0U)
1443 #define __HAL_RCC_GPIOD_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN) == 0U)
Dstm32l5xx_ll_bus.h91 #define LL_AHB2_GRP1_PERIPH_GPIOD RCC_AHB2ENR_GPIODEN
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h769 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN); \
771 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN); \
928 #define __HAL_RCC_GPIOD_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN)
1710 #define __HAL_RCC_GPIOD_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN) != 0U)
1775 #define __HAL_RCC_GPIOD_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN) == 0U)
Dstm32l4xx_ll_bus.h100 #define LL_AHB2_GRP1_PERIPH_GPIOD RCC_AHB2ENR_GPIODEN
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h926 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN); \
928 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN); \
1079 #define __HAL_RCC_GPIOD_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN)
2164 #define __HAL_RCC_GPIOD_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN) != 0U)
2221 #define __HAL_RCC_GPIOD_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN) == 0U)
Dstm32h5xx_ll_bus.h143 #define LL_AHB2_GRP1_PERIPH_GPIOD RCC_AHB2ENR_GPIODEN
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_bus.h99 #define LL_AHB2_GRP1_PERIPH_GPIOD RCC_AHB2ENR_GPIODEN
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h7569 #define RCC_AHB2ENR_GPIODEN RCC_AHB2ENR_GPIODEN_Msk macro
Dstm32g411xc.h7740 #define RCC_AHB2ENR_GPIODEN RCC_AHB2ENR_GPIODEN_Msk macro
Dstm32g441xx.h7944 #define RCC_AHB2ENR_GPIODEN RCC_AHB2ENR_GPIODEN_Msk macro
Dstm32gbk1cb.h7703 #define RCC_AHB2ENR_GPIODEN RCC_AHB2ENR_GPIODEN_Msk macro
Dstm32g431xx.h7720 #define RCC_AHB2ENR_GPIODEN RCC_AHB2ENR_GPIODEN_Msk macro
Dstm32g4a1xx.h8317 #define RCC_AHB2ENR_GPIODEN RCC_AHB2ENR_GPIODEN_Msk macro
Dstm32g491xx.h8093 #define RCC_AHB2ENR_GPIODEN RCC_AHB2ENR_GPIODEN_Msk macro
Dstm32g473xx.h8774 #define RCC_AHB2ENR_GPIODEN RCC_AHB2ENR_GPIODEN_Msk macro
Dstm32g471xx.h8248 #define RCC_AHB2ENR_GPIODEN RCC_AHB2ENR_GPIODEN_Msk macro
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h6112 #define RCC_AHB2ENR_GPIODEN RCC_AHB2ENR_GPIODEN_Msk macro
Dstm32l412xx.h5893 #define RCC_AHB2ENR_GPIODEN RCC_AHB2ENR_GPIODEN_Msk macro
Dstm32l433xx.h9869 #define RCC_AHB2ENR_GPIODEN RCC_AHB2ENR_GPIODEN_Msk macro
Dstm32l451xx.h10030 #define RCC_AHB2ENR_GPIODEN RCC_AHB2ENR_GPIODEN_Msk macro
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb55xx.h7867 #define RCC_AHB2ENR_GPIODEN RCC_AHB2ENR_GPIODEN_Msk macro
Dstm32wb5mxx.h7867 #define RCC_AHB2ENR_GPIODEN RCC_AHB2ENR_GPIODEN_Msk macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h8931 #define RCC_AHB2ENR_GPIODEN RCC_AHB2ENR_GPIODEN_Msk macro

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