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Searched refs:RCC_AHB1ENR_DCACHE1EN (Results 1 – 21 of 21) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h802 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DCACHE1EN); \
804 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DCACHE1EN); \
856 #define __HAL_RCC_DCACHE1_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DCACHE1EN)
2028 #define __HAL_RCC_DCACHE1_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DCACHE1EN) != 0…
2072 #define __HAL_RCC_DCACHE1_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DCACHE1EN) == 0…
Dstm32u5xx_ll_bus.h99 #define LL_AHB1_GRP1_PERIPH_DCACHE1 RCC_AHB1ENR_DCACHE1EN
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h837 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DCACHE1EN); \
839 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DCACHE1EN); \
884 #define __HAL_RCC_DCACHE1_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DCACHE1EN)
2105 #define __HAL_RCC_DCACHE1_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DCACHE1EN) != 0…
2142 #define __HAL_RCC_DCACHE1_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DCACHE1EN) == 0…
Dstm32h5xx_ll_bus.h123 #define LL_AHB1_GRP1_PERIPH_DCACHE1 RCC_AHB1ENR_DCACHE1EN
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h13220 #define RCC_AHB1ENR_DCACHE1EN RCC_AHB1ENR_DCACHE1EN_Msk macro
Dstm32h562xx.h13981 #define RCC_AHB1ENR_DCACHE1EN RCC_AHB1ENR_DCACHE1EN_Msk macro
Dstm32h533xx.h13748 #define RCC_AHB1ENR_DCACHE1EN RCC_AHB1ENR_DCACHE1EN_Msk macro
Dstm32h573xx.h16596 #define RCC_AHB1ENR_DCACHE1EN RCC_AHB1ENR_DCACHE1EN_Msk macro
Dstm32h563xx.h16068 #define RCC_AHB1ENR_DCACHE1EN RCC_AHB1ENR_DCACHE1EN_Msk macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h15110 #define RCC_AHB1ENR_DCACHE1EN RCC_AHB1ENR_DCACHE1EN_Msk /*!< DCACHE1 Cl… macro
Dstm32u535xx.h14585 #define RCC_AHB1ENR_DCACHE1EN RCC_AHB1ENR_DCACHE1EN_Msk /*!< DCACHE1 Cl… macro
Dstm32u575xx.h16026 #define RCC_AHB1ENR_DCACHE1EN RCC_AHB1ENR_DCACHE1EN_Msk /*!< DCACHE1 Cl… macro
Dstm32u585xx.h16603 #define RCC_AHB1ENR_DCACHE1EN RCC_AHB1ENR_DCACHE1EN_Msk /*!< DCACHE1 Cl… macro
Dstm32u595xx.h17069 #define RCC_AHB1ENR_DCACHE1EN RCC_AHB1ENR_DCACHE1EN_Msk /*!< DCACHE1 Cl… macro
Dstm32u5a5xx.h17646 #define RCC_AHB1ENR_DCACHE1EN RCC_AHB1ENR_DCACHE1EN_Msk /*!< DCACHE1 Cl… macro
Dstm32u5f7xx.h18629 #define RCC_AHB1ENR_DCACHE1EN RCC_AHB1ENR_DCACHE1EN_Msk /*!< DCACHE1 Cl… macro
Dstm32u599xx.h20816 #define RCC_AHB1ENR_DCACHE1EN RCC_AHB1ENR_DCACHE1EN_Msk /*!< DCACHE1 Cl… macro
Dstm32u5g7xx.h19206 #define RCC_AHB1ENR_DCACHE1EN RCC_AHB1ENR_DCACHE1EN_Msk /*!< DCACHE1 Cl… macro
Dstm32u5f9xx.h21761 #define RCC_AHB1ENR_DCACHE1EN RCC_AHB1ENR_DCACHE1EN_Msk /*!< DCACHE1 Cl… macro
Dstm32u5a9xx.h21393 #define RCC_AHB1ENR_DCACHE1EN RCC_AHB1ENR_DCACHE1EN_Msk /*!< DCACHE1 Cl… macro
Dstm32u5g9xx.h22338 #define RCC_AHB1ENR_DCACHE1EN RCC_AHB1ENR_DCACHE1EN_Msk /*!< DCACHE1 Cl… macro