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Searched refs:QUADSPI_CR_TCEN_Pos (Results 1 – 25 of 83) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h7548 #define QUADSPI_CR_TCEN_Pos (3U) macro
7549 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32l412xx.h7323 #define QUADSPI_CR_TCEN_Pos (3U) macro
7324 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32l433xx.h12013 #define QUADSPI_CR_TCEN_Pos (3U) macro
12014 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32l451xx.h12068 #define QUADSPI_CR_TCEN_Pos (3U) macro
12069 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32l442xx.h11243 #define QUADSPI_CR_TCEN_Pos (3U) macro
11244 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32l431xx.h11784 #define QUADSPI_CR_TCEN_Pos (3U) macro
11785 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32l432xx.h11018 #define QUADSPI_CR_TCEN_Pos (3U) macro
11019 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb35xx.h6911 #define QUADSPI_CR_TCEN_Pos (3U) macro
6912 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32wb55xx.h7102 #define QUADSPI_CR_TCEN_Pos (3U) macro
7103 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32wb5mxx.h7102 #define QUADSPI_CR_TCEN_Pos (3U) macro
7103 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g4a1xx.h7620 #define QUADSPI_CR_TCEN_Pos (3U) macro
7621 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32g491xx.h7399 #define QUADSPI_CR_TCEN_Pos (3U) macro
7400 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32g473xx.h8062 #define QUADSPI_CR_TCEN_Pos (3U) macro
8063 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32g471xx.h7548 #define QUADSPI_CR_TCEN_Pos (3U) macro
7549 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32g483xx.h8283 #define QUADSPI_CR_TCEN_Pos (3U) macro
8284 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h8889 #define QUADSPI_CR_TCEN_Pos (3U) macro
8890 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32f722xx.h8873 #define QUADSPI_CR_TCEN_Pos (3U) macro
8874 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32f730xx.h9103 #define QUADSPI_CR_TCEN_Pos (3U) macro
9104 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32f733xx.h9103 #define QUADSPI_CR_TCEN_Pos (3U) macro
9104 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32f732xx.h9087 #define QUADSPI_CR_TCEN_Pos (3U) macro
9088 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f423xx.h9269 #define QUADSPI_CR_TCEN_Pos (3U) macro
9270 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32f412zx.h8999 #define QUADSPI_CR_TCEN_Pos (3U) macro
9000 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32f412rx.h8993 #define QUADSPI_CR_TCEN_Pos (3U) macro
8994 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32f412vx.h8995 #define QUADSPI_CR_TCEN_Pos (3U) macro
8996 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32f413xx.h9233 #define QUADSPI_CR_TCEN_Pos (3U) macro
9234 #define QUADSPI_CR_TCEN_Msk (0x1UL << QUADSPI_CR_TCEN_Pos) /*!< 0x00000008 */

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