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Searched refs:QUADSPI_CCR_DHHC_Pos (Results 1 – 25 of 75) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h7689 #define QUADSPI_CCR_DHHC_Pos (30U) macro
7690 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32l412xx.h7464 #define QUADSPI_CCR_DHHC_Pos (30U) macro
7465 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32l433xx.h12154 #define QUADSPI_CCR_DHHC_Pos (30U) macro
12155 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32l451xx.h12209 #define QUADSPI_CCR_DHHC_Pos (30U) macro
12210 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32l442xx.h11384 #define QUADSPI_CCR_DHHC_Pos (30U) macro
11385 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32l431xx.h11925 #define QUADSPI_CCR_DHHC_Pos (30U) macro
11926 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32l432xx.h11159 #define QUADSPI_CCR_DHHC_Pos (30U) macro
11160 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32l443xx.h12379 #define QUADSPI_CCR_DHHC_Pos (30U) macro
12380 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32l452xx.h12287 #define QUADSPI_CCR_DHHC_Pos (30U) macro
12288 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g4a1xx.h7761 #define QUADSPI_CCR_DHHC_Pos (30U) macro
7762 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32g491xx.h7540 #define QUADSPI_CCR_DHHC_Pos (30U) macro
7541 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32g473xx.h8203 #define QUADSPI_CCR_DHHC_Pos (30U) macro
8204 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32g471xx.h7689 #define QUADSPI_CCR_DHHC_Pos (30U) macro
7690 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32g483xx.h8424 #define QUADSPI_CCR_DHHC_Pos (30U) macro
8425 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h9067 #define QUADSPI_CCR_DHHC_Pos (30U) macro
9068 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32f722xx.h9051 #define QUADSPI_CCR_DHHC_Pos (30U) macro
9052 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32f730xx.h9281 #define QUADSPI_CCR_DHHC_Pos (30U) macro
9282 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32f733xx.h9281 #define QUADSPI_CCR_DHHC_Pos (30U) macro
9282 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32f732xx.h9265 #define QUADSPI_CCR_DHHC_Pos (30U) macro
9266 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f423xx.h9447 #define QUADSPI_CCR_DHHC_Pos (30U) macro
9448 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32f412zx.h9177 #define QUADSPI_CCR_DHHC_Pos (30U) macro
9178 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32f412rx.h9171 #define QUADSPI_CCR_DHHC_Pos (30U) macro
9172 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32f412vx.h9173 #define QUADSPI_CCR_DHHC_Pos (30U) macro
9174 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32f413xx.h9411 #define QUADSPI_CCR_DHHC_Pos (30U) macro
9412 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */
Dstm32f446xx.h9982 #define QUADSPI_CCR_DHHC_Pos (30U) macro
9983 #define QUADSPI_CCR_DHHC_Msk (0x1UL << QUADSPI_CCR_DHHC_Pos) /*!< 0x40000000 */

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