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Searched refs:QSPI_R_BASE (Results 1 – 25 of 80) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h846 #define QSPI_R_BASE (0xA0001000UL) /*!< QUADSPI control registers base address */ macro
1036 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32l412xx.h813 #define QSPI_R_BASE (0xA0001000UL) /*!< QUADSPI control registers base address */ macro
1001 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32l433xx.h980 #define QSPI_R_BASE (0xA0001000UL) /*!< QUADSPI control registers base address */ macro
1194 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32l451xx.h946 #define QSPI_R_BASE (0xA0001000UL) /*!< QUADSPI control registers base address */ macro
1177 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32l442xx.h955 #define QSPI_R_BASE (0xA0001000UL) /*!< QUADSPI control registers base address */ macro
1155 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32l431xx.h926 #define QSPI_R_BASE (0xA0001000UL) /*!< QUADSPI control registers base address */ macro
1135 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32l432xx.h922 #define QSPI_R_BASE (0xA0001000UL) /*!< QUADSPI control registers base address */ macro
1120 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32l443xx.h1013 #define QSPI_R_BASE (0xA0001000UL) /*!< QUADSPI control registers base address */ macro
1229 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32l471xx.h1003 #define QSPI_R_BASE (0xA0001000UL) /*!< QUADSPI control registers base address */ macro
1291 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g4a1xx.h1009 #define QSPI_R_BASE (0xA0001000UL) /*!< QUADSPI control registers base address */ macro
1296 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32g491xx.h977 #define QSPI_R_BASE (0xA0001000UL) /*!< QUADSPI control registers base address */ macro
1262 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32g473xx.h1027 #define QSPI_R_BASE (0xA0001000UL) /*!< QUADSPI control registers base address */ macro
1351 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32g471xx.h986 #define QSPI_R_BASE (0xA0001000UL) /*!< QUADSPI control registers base address */ macro
1273 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32g483xx.h1059 #define QSPI_R_BASE (0xA0001000UL) /*!< QUADSPI control registers base address */ macro
1385 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h940 #define QSPI_R_BASE 0xA0001000UL /*!< Base address of : QSPI Control registers … macro
1170 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32f722xx.h926 #define QSPI_R_BASE 0xA0001000UL /*!< Base address of : QSPI Control registers … macro
1155 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32f730xx.h972 #define QSPI_R_BASE 0xA0001000UL /*!< Base address of : QSPI Control registers … macro
1204 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32f733xx.h972 #define QSPI_R_BASE 0xA0001000UL /*!< Base address of : QSPI Control registers … macro
1204 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32f732xx.h958 #define QSPI_R_BASE 0xA0001000UL /*!< Base address of : QSPI Control registers … macro
1189 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f423xx.h953 #define QSPI_R_BASE 0xA0001000UL /*!< QuadSPI registers base address … macro
1223 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32f412zx.h841 #define QSPI_R_BASE 0xA0001000UL /*!< QuadSPI registers base address … macro
1058 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32f412rx.h841 #define QSPI_R_BASE 0xA0001000UL /*!< QuadSPI registers base address … macro
1052 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32f412vx.h841 #define QSPI_R_BASE 0xA0001000UL /*!< QuadSPI registers base address … macro
1054 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32f413xx.h919 #define QSPI_R_BASE 0xA0001000UL /*!< QuadSPI registers base address … macro
1187 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)
Dstm32f446xx.h923 #define QSPI_R_BASE 0xA0001000UL /*!< QuadSPI registers base address … macro
1155 #define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE)

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