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Searched refs:PWR_SVMCR_PVDLS_0 (Results 1 – 21 of 21) sorted by relevance

/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_pwr.h216 #define LL_PWR_PVDLEVEL_1 PWR_SVMCR_PVDLS_0 /*!< Voltage threshold detected b…
218 #define LL_PWR_PVDLEVEL_3 (PWR_SVMCR_PVDLS_0 | PWR_SVMCR_PVDLS_1) /*!< Voltage threshold detected b…
220 #define LL_PWR_PVDLEVEL_5 (PWR_SVMCR_PVDLS_0 | PWR_SVMCR_PVDLS_2) /*!< Voltage threshold detected b…
Dstm32wbaxx_hal_pwr.h70 #define PWR_PVDLEVEL_1 (PWR_SVMCR_PVDLS_0) /*!< PVD threshold around 2.2 V …
72 #define PWR_PVDLEVEL_3 (PWR_SVMCR_PVDLS_0 | PWR_SVMCR_PVDLS_1) /*!< PVD threshold around 2.5 V …
74 #define PWR_PVDLEVEL_5 (PWR_SVMCR_PVDLS_0 | PWR_SVMCR_PVDLS_2) /*!< PVD threshold around 2.8 V …
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_pwr.h70 #define PWR_PVDLEVEL_1 (PWR_SVMCR_PVDLS_0) /*!< PVD threshold around 2.2 V …
72 #define PWR_PVDLEVEL_3 (PWR_SVMCR_PVDLS_0 | PWR_SVMCR_PVDLS_1) /*!< PVD threshold around 2.5 V …
74 #define PWR_PVDLEVEL_5 (PWR_SVMCR_PVDLS_0 | PWR_SVMCR_PVDLS_2) /*!< PVD threshold around 2.8 V …
Dstm32u5xx_ll_pwr.h446 #define LL_PWR_PVDLEVEL_1 PWR_SVMCR_PVDLS_0 /*!< Voltage threshold detected b…
448 #define LL_PWR_PVDLEVEL_3 (PWR_SVMCR_PVDLS_0 | PWR_SVMCR_PVDLS_1) /*!< Voltage threshold detected b…
450 #define LL_PWR_PVDLEVEL_5 (PWR_SVMCR_PVDLS_0 | PWR_SVMCR_PVDLS_2) /*!< Voltage threshold detected b…
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h5319 #define PWR_SVMCR_PVDLS_0 (0x1UL << PWR_SVMCR_PVDLS_Pos) /*!< 0x00000020… macro
Dstm32wba52xx.h8920 #define PWR_SVMCR_PVDLS_0 (0x1UL << PWR_SVMCR_PVDLS_Pos) /*!< 0x00000020… macro
Dstm32wba54xx.h9190 #define PWR_SVMCR_PVDLS_0 (0x1UL << PWR_SVMCR_PVDLS_Pos) /*!< 0x00000020… macro
Dstm32wba5mxx.h9196 #define PWR_SVMCR_PVDLS_0 (0x1UL << PWR_SVMCR_PVDLS_Pos) /*!< 0x00000020… macro
Dstm32wba55xx.h9196 #define PWR_SVMCR_PVDLS_0 (0x1UL << PWR_SVMCR_PVDLS_Pos) /*!< 0x00000020… macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h12991 #define PWR_SVMCR_PVDLS_0 (0x1UL << PWR_SVMCR_PVDLS_Pos) /*!< 0x00000020… macro
Dstm32u535xx.h12478 #define PWR_SVMCR_PVDLS_0 (0x1UL << PWR_SVMCR_PVDLS_Pos) /*!< 0x00000020… macro
Dstm32u575xx.h13640 #define PWR_SVMCR_PVDLS_0 (0x1UL << PWR_SVMCR_PVDLS_Pos) /*!< 0x00000020… macro
Dstm32u585xx.h14202 #define PWR_SVMCR_PVDLS_0 (0x1UL << PWR_SVMCR_PVDLS_Pos) /*!< 0x00000020… macro
Dstm32u595xx.h14462 #define PWR_SVMCR_PVDLS_0 (0x1UL << PWR_SVMCR_PVDLS_Pos) /*!< 0x00000020… macro
Dstm32u5a5xx.h15024 #define PWR_SVMCR_PVDLS_0 (0x1UL << PWR_SVMCR_PVDLS_Pos) /*!< 0x00000020… macro
Dstm32u5f7xx.h15963 #define PWR_SVMCR_PVDLS_0 (0x1UL << PWR_SVMCR_PVDLS_Pos) /*!< 0x00000020… macro
Dstm32u599xx.h18181 #define PWR_SVMCR_PVDLS_0 (0x1UL << PWR_SVMCR_PVDLS_Pos) /*!< 0x00000020… macro
Dstm32u5g7xx.h16525 #define PWR_SVMCR_PVDLS_0 (0x1UL << PWR_SVMCR_PVDLS_Pos) /*!< 0x00000020… macro
Dstm32u5f9xx.h19092 #define PWR_SVMCR_PVDLS_0 (0x1UL << PWR_SVMCR_PVDLS_Pos) /*!< 0x00000020… macro
Dstm32u5a9xx.h18743 #define PWR_SVMCR_PVDLS_0 (0x1UL << PWR_SVMCR_PVDLS_Pos) /*!< 0x00000020… macro
Dstm32u5g9xx.h19654 #define PWR_SVMCR_PVDLS_0 (0x1UL << PWR_SVMCR_PVDLS_Pos) /*!< 0x00000020… macro