Searched refs:PWR_CR5_SRAM6PDS1_Pos (Results 1 – 5 of 5) sorted by relevance
1984 CLEAR_BIT(PWR->CR5, (dummy << PWR_CR5_SRAM6PDS1_Pos)); in HAL_PWREx_EnableRAMsContentStopRetention()2234 SET_BIT(PWR->CR5, (dummy << PWR_CR5_SRAM6PDS1_Pos)); in HAL_PWREx_DisableRAMsContentStopRetention()
17316 #define PWR_CR5_SRAM6PDS1_Pos (0U) macro17317 #define PWR_CR5_SRAM6PDS1_Msk (0x1UL << PWR_CR5_SRAM6PDS1_Pos) /*!< 0x00000001 …
17878 #define PWR_CR5_SRAM6PDS1_Pos (0U) macro17879 #define PWR_CR5_SRAM6PDS1_Msk (0x1UL << PWR_CR5_SRAM6PDS1_Pos) /*!< 0x00000001 …
20445 #define PWR_CR5_SRAM6PDS1_Pos (0U) macro20446 #define PWR_CR5_SRAM6PDS1_Msk (0x1UL << PWR_CR5_SRAM6PDS1_Pos) /*!< 0x00000001 …
21007 #define PWR_CR5_SRAM6PDS1_Pos (0U) macro21008 #define PWR_CR5_SRAM6PDS1_Msk (0x1UL << PWR_CR5_SRAM6PDS1_Pos) /*!< 0x00000001 …
