Searched refs:PWR_CR2_SRAM3PDS1_Pos (Results 1 – 11 of 11) sorted by relevance
1805 CLEAR_BIT(PWR->CR2, (dummy << PWR_CR2_SRAM3PDS1_Pos)); in HAL_PWREx_EnableRAMsContentStopRetention()2055 SET_BIT(PWR->CR2, (dummy << PWR_CR2_SRAM3PDS1_Pos)); in HAL_PWREx_DisableRAMsContentStopRetention()
13581 #define PWR_CR2_SRAM3PDS1_Pos (16U) macro13582 #define PWR_CR2_SRAM3PDS1_Msk (0x1UL << PWR_CR2_SRAM3PDS1_Pos) /*!< 0x00010000…
14143 #define PWR_CR2_SRAM3PDS1_Pos (16U) macro14144 #define PWR_CR2_SRAM3PDS1_Msk (0x1UL << PWR_CR2_SRAM3PDS1_Pos) /*!< 0x00010000…
14385 #define PWR_CR2_SRAM3PDS1_Pos (16U) macro14386 #define PWR_CR2_SRAM3PDS1_Msk (0x1UL << PWR_CR2_SRAM3PDS1_Pos) /*!< 0x00010000…
14947 #define PWR_CR2_SRAM3PDS1_Pos (16U) macro14948 #define PWR_CR2_SRAM3PDS1_Msk (0x1UL << PWR_CR2_SRAM3PDS1_Pos) /*!< 0x00010000…
15886 #define PWR_CR2_SRAM3PDS1_Pos (16U) macro15887 #define PWR_CR2_SRAM3PDS1_Msk (0x1UL << PWR_CR2_SRAM3PDS1_Pos) /*!< 0x00010000…
18104 #define PWR_CR2_SRAM3PDS1_Pos (16U) macro18105 #define PWR_CR2_SRAM3PDS1_Msk (0x1UL << PWR_CR2_SRAM3PDS1_Pos) /*!< 0x00010000…
16448 #define PWR_CR2_SRAM3PDS1_Pos (16U) macro16449 #define PWR_CR2_SRAM3PDS1_Msk (0x1UL << PWR_CR2_SRAM3PDS1_Pos) /*!< 0x00010000…
19012 #define PWR_CR2_SRAM3PDS1_Pos (16U) macro19013 #define PWR_CR2_SRAM3PDS1_Msk (0x1UL << PWR_CR2_SRAM3PDS1_Pos) /*!< 0x00010000…
18666 #define PWR_CR2_SRAM3PDS1_Pos (16U) macro18667 #define PWR_CR2_SRAM3PDS1_Msk (0x1UL << PWR_CR2_SRAM3PDS1_Pos) /*!< 0x00010000…
19574 #define PWR_CR2_SRAM3PDS1_Pos (16U) macro19575 #define PWR_CR2_SRAM3PDS1_Msk (0x1UL << PWR_CR2_SRAM3PDS1_Pos) /*!< 0x00010000…
