Searched refs:PWR_CR2_DC2RAMPDS_Pos (Results 1 – 9 of 9) sorted by relevance
1909 CLEAR_BIT(PWR->CR2, (dummy << PWR_CR2_DC2RAMPDS_Pos)); in HAL_PWREx_EnableRAMsContentStopRetention()2159 SET_BIT(PWR->CR2, (dummy << PWR_CR2_DC2RAMPDS_Pos)); in HAL_PWREx_DisableRAMsContentStopRetention()
14364 #define PWR_CR2_DC2RAMPDS_Pos (7U) macro14365 #define PWR_CR2_DC2RAMPDS_Msk (0x1UL << PWR_CR2_DC2RAMPDS_Pos) /*!< 0x00000080…
14923 #define PWR_CR2_DC2RAMPDS_Pos (7U) macro14924 #define PWR_CR2_DC2RAMPDS_Msk (0x1UL << PWR_CR2_DC2RAMPDS_Pos) /*!< 0x00000080…
15865 #define PWR_CR2_DC2RAMPDS_Pos (7U) macro15866 #define PWR_CR2_DC2RAMPDS_Msk (0x1UL << PWR_CR2_DC2RAMPDS_Pos) /*!< 0x00000080…
18083 #define PWR_CR2_DC2RAMPDS_Pos (7U) macro18084 #define PWR_CR2_DC2RAMPDS_Msk (0x1UL << PWR_CR2_DC2RAMPDS_Pos) /*!< 0x00000080…
16424 #define PWR_CR2_DC2RAMPDS_Pos (7U) macro16425 #define PWR_CR2_DC2RAMPDS_Msk (0x1UL << PWR_CR2_DC2RAMPDS_Pos) /*!< 0x00000080…
18991 #define PWR_CR2_DC2RAMPDS_Pos (7U) macro18992 #define PWR_CR2_DC2RAMPDS_Msk (0x1UL << PWR_CR2_DC2RAMPDS_Pos) /*!< 0x00000080…
18642 #define PWR_CR2_DC2RAMPDS_Pos (7U) macro18643 #define PWR_CR2_DC2RAMPDS_Msk (0x1UL << PWR_CR2_DC2RAMPDS_Pos) /*!< 0x00000080…
19550 #define PWR_CR2_DC2RAMPDS_Pos (7U) macro19551 #define PWR_CR2_DC2RAMPDS_Msk (0x1UL << PWR_CR2_DC2RAMPDS_Pos) /*!< 0x00000080…
