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Searched refs:LL_AHB1_GRP1_PERIPH_DMA1 (Results 1 – 25 of 34) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_hal_rcc.h791 …fine __HAL_RCC_DMA1_CLK_ENABLE() LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1)
796 …ine __HAL_RCC_DMA1_CLK_DISABLE() LL_AHB1_GRP1_DisableClock(LL_AHB1_GRP1_PERIPH_DMA1)
1029 …e __HAL_RCC_DMA1_IS_CLK_ENABLED() LL_AHB1_GRP1_IsEnabledClock(LL_AHB1_GRP1_PERIPH_DMA1)
1178 …efine __HAL_RCC_DMA1_FORCE_RESET() LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1)
1184 …ine __HAL_RCC_DMA1_RELEASE_RESET() LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1)
1354 …__HAL_RCC_DMA1_CLK_SLEEP_ENABLE() LL_AHB1_GRP1_EnableClockSleep(LL_AHB1_GRP1_PERIPH_DMA1)
1359 …_HAL_RCC_DMA1_CLK_SLEEP_DISABLE() LL_AHB1_GRP1_DisableClockSleep(LL_AHB1_GRP1_PERIPH_DMA1)
1590 …RCC_DMA1_IS_CLK_SLEEP_ENABLED() LL_C2_AHB1_GRP1_IsEnabledClockSleep(LL_AHB1_GRP1_PERIPH_DMA1)
1595 …AL_RCC_DMA1_IS_CLK_SLEEP_ENABLED() LL_AHB1_GRP1_IsEnabledClockSleep(LL_AHB1_GRP1_PERIPH_DMA1)
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_rcc.h877 #define __HAL_RCC_DMA1_CLK_ENABLE() LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1)
887 #define __HAL_RCC_DMA1_CLK_DISABLE() LL_AHB1_GRP1_DisableClock(LL_AHB1_GRP1_PERIPH_DMA1)
1079 #define __HAL_RCC_DMA1_IS_CLK_ENABLED() LL_AHB1_GRP1_IsEnabledClock(LL_AHB1_GRP1_PERIPH_DMA1)
1089 …ine __HAL_RCC_DMA1_IS_CLK_DISABLED() !(LL_AHB1_GRP1_IsEnabledClock(LL_AHB1_GRP1_PERIPH_DMA1))
1729 #define __HAL_RCC_DMA1_FORCE_RESET() LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1)
1741 #define __HAL_RCC_DMA1_RELEASE_RESET() LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1)
1950 …ine __HAL_RCC_DMA1_CLK_SLEEP_ENABLE() LL_AHB1_GRP1_EnableClockSleep(LL_AHB1_GRP1_PERIPH_DMA1)
1961 …ne __HAL_RCC_DMA1_CLK_SLEEP_DISABLE() LL_AHB1_GRP1_DisableClockSleep(LL_AHB1_GRP1_PERIPH_DMA1)
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/src/
Dstm32c0xx_ll_dma.c133 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
136 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_ll_dma.c144 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
147 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_ll_dma.c135 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
138 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_ll_bdma.c142 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_BDMA_DeInit()
145 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_BDMA_DeInit()
Dstm32h7xx_ll_dma.c173 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
176 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_ll_dma.c145 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
148 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_ll_dma.c163 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
166 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_ll_dma.c164 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
167 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_ll_dma.c158 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
161 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_ll_dma.c153 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
156 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_ll_dma.c163 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
166 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_ll_dma.c175 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
178 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_ll_dma.c170 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
173 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_ll_dma.c168 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
171 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_ll_dma.c189 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
192 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1); in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_bus.h73 #define LL_AHB1_GRP1_PERIPH_DMA1 RCC_AHBENR_DMA1EN macro
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_bus.h73 #define LL_AHB1_GRP1_PERIPH_DMA1 RCC_AHBENR_DMA1EN macro
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_bus.h77 #define LL_AHB1_GRP1_PERIPH_DMA1 RCC_AHBENR_DMA1EN macro
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_bus.h90 #define LL_AHB1_GRP1_PERIPH_DMA1 RCC_AHBENR_DMA1EN macro
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_bus.h73 #define LL_AHB1_GRP1_PERIPH_DMA1 RCC_AHBENR_DMA1EN /*!< DMA1 clock enable */ macro
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_bus.h75 #define LL_AHB1_GRP1_PERIPH_DMA1 RCC_AHBENR_DMA1EN macro
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_bus.h81 #define LL_AHB1_GRP1_PERIPH_DMA1 RCC_AHBENR_DMA1EN macro
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_bus.h73 #define LL_AHB1_GRP1_PERIPH_DMA1 RCC_AHBENR_DMA1EN macro

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