Home
last modified time | relevance | path

Searched refs:IWDG_SR_ONF_Pos (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h4617 #define IWDG_SR_ONF_Pos (8U) macro
4618 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100…
Dstm32wba52xx.h8218 #define IWDG_SR_ONF_Pos (8U) macro
8219 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100…
Dstm32wba54xx.h8452 #define IWDG_SR_ONF_Pos (8U) macro
8453 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100…
Dstm32wba5mxx.h8452 #define IWDG_SR_ONF_Pos (8U) macro
8453 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100…
Dstm32wba55xx.h8452 #define IWDG_SR_ONF_Pos (8U) macro
8453 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100…
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h4254 #define IWDG_SR_ONF_Pos (8U) macro
4255 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100 */
Dstm32u083xx.h4793 #define IWDG_SR_ONF_Pos (8U) macro
4794 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100 */
Dstm32u073xx.h4535 #define IWDG_SR_ONF_Pos (8U) macro
4536 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100 */
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h12434 #define IWDG_SR_ONF_Pos (8U) macro
12435 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100…
Dstm32h523xx.h18420 #define IWDG_SR_ONF_Pos (8U) macro
18421 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100…
Dstm32h562xx.h19964 #define IWDG_SR_ONF_Pos (8U) macro
19965 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100…
Dstm32h533xx.h19013 #define IWDG_SR_ONF_Pos (8U) macro
19014 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100…
Dstm32h573xx.h22689 #define IWDG_SR_ONF_Pos (8U) macro
22690 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100…
Dstm32h563xx.h22096 #define IWDG_SR_ONF_Pos (8U) macro
22097 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100…
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h12205 #define IWDG_SR_ONF_Pos (8U) macro
12206 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100 */
Dstm32h7s7xx.h12794 #define IWDG_SR_ONF_Pos (8U) macro
12795 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100 */
Dstm32h7s3xx.h12650 #define IWDG_SR_ONF_Pos (8U) macro
12651 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100 */
Dstm32h7r7xx.h12347 #define IWDG_SR_ONF_Pos (8U) macro
12348 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100 */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h22529 #define IWDG_SR_ONF_Pos (8U) macro
22530 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100 */
Dstm32n657xx.h23471 #define IWDG_SR_ONF_Pos (8U) macro
23472 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100 */
Dstm32n655xx.h23229 #define IWDG_SR_ONF_Pos (8U) macro
23230 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100 */
Dstm32n647xx.h22771 #define IWDG_SR_ONF_Pos (8U) macro
22772 #define IWDG_SR_ONF_Msk (0x1UL << IWDG_SR_ONF_Pos) /*!< 0x00000100 */