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Searched refs:IWDG_RLR_RL_Pos (Results 1 – 25 of 278) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wb0x/soc/
Dstm32wb05.h1577 #define IWDG_RLR_RL_Pos (0UL) /*!<IWDG RLR: R… macro
1580 #define IWDG_RLR_RL_0 (0x1U << IWDG_RLR_RL_Pos)
1581 #define IWDG_RLR_RL_1 (0x2U << IWDG_RLR_RL_Pos)
1582 #define IWDG_RLR_RL_2 (0x4U << IWDG_RLR_RL_Pos)
1583 #define IWDG_RLR_RL_3 (0x8U << IWDG_RLR_RL_Pos)
1584 …efine IWDG_RLR_RL_4 (0x10U << IWDG_RLR_RL_Pos)
1585 …efine IWDG_RLR_RL_5 (0x20U << IWDG_RLR_RL_Pos)
1586 …efine IWDG_RLR_RL_6 (0x40U << IWDG_RLR_RL_Pos)
1587 …efine IWDG_RLR_RL_7 (0x80U << IWDG_RLR_RL_Pos)
1588 …fine IWDG_RLR_RL_8 (0x100U << IWDG_RLR_RL_Pos)
[all …]
Dstm32wb07.h1666 #define IWDG_RLR_RL_Pos (0UL) /*!< IWDG RLR: RL (Bit 0) … macro
1669 #define IWDG_RLR_RL_0 (0x1U << IWDG_RLR_RL_Pos)
1670 #define IWDG_RLR_RL_1 (0x2U << IWDG_RLR_RL_Pos)
1671 #define IWDG_RLR_RL_2 (0x4U << IWDG_RLR_RL_Pos)
1672 #define IWDG_RLR_RL_3 (0x8U << IWDG_RLR_RL_Pos)
1673 #define IWDG_RLR_RL_4 (0x10U << IWDG_RLR_RL_Pos)
1674 #define IWDG_RLR_RL_5 (0x20U << IWDG_RLR_RL_Pos)
1675 #define IWDG_RLR_RL_6 (0x40U << IWDG_RLR_RL_Pos)
1676 #define IWDG_RLR_RL_7 (0x80U << IWDG_RLR_RL_Pos)
1677 #define IWDG_RLR_RL_8 (0x100U << IWDG_RLR_RL_Pos)
[all …]
Dstm32wb09.h1577 #define IWDG_RLR_RL_Pos (0UL) /*!<IWDG RLR: R… macro
1580 #define IWDG_RLR_RL_0 (0x1U << IWDG_RLR_RL_Pos)
1581 #define IWDG_RLR_RL_1 (0x2U << IWDG_RLR_RL_Pos)
1582 #define IWDG_RLR_RL_2 (0x4U << IWDG_RLR_RL_Pos)
1583 #define IWDG_RLR_RL_3 (0x8U << IWDG_RLR_RL_Pos)
1584 …efine IWDG_RLR_RL_4 (0x10U << IWDG_RLR_RL_Pos)
1585 …efine IWDG_RLR_RL_5 (0x20U << IWDG_RLR_RL_Pos)
1586 …efine IWDG_RLR_RL_6 (0x40U << IWDG_RLR_RL_Pos)
1587 …efine IWDG_RLR_RL_7 (0x80U << IWDG_RLR_RL_Pos)
1588 …fine IWDG_RLR_RL_8 (0x100U << IWDG_RLR_RL_Pos)
[all …]
Dstm32wb06.h1666 #define IWDG_RLR_RL_Pos (0UL) /*!< IWDG RLR: RL (Bit 0) … macro
1669 #define IWDG_RLR_RL_0 (0x1U << IWDG_RLR_RL_Pos)
1670 #define IWDG_RLR_RL_1 (0x2U << IWDG_RLR_RL_Pos)
1671 #define IWDG_RLR_RL_2 (0x4U << IWDG_RLR_RL_Pos)
1672 #define IWDG_RLR_RL_3 (0x8U << IWDG_RLR_RL_Pos)
1673 #define IWDG_RLR_RL_4 (0x10U << IWDG_RLR_RL_Pos)
1674 #define IWDG_RLR_RL_5 (0x20U << IWDG_RLR_RL_Pos)
1675 #define IWDG_RLR_RL_6 (0x40U << IWDG_RLR_RL_Pos)
1676 #define IWDG_RLR_RL_7 (0x80U << IWDG_RLR_RL_Pos)
1677 #define IWDG_RLR_RL_8 (0x100U << IWDG_RLR_RL_Pos)
[all …]
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h4216 #define IWDG_RLR_RL_Pos (0U) macro
4217 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
Dstm32f101xb.h4278 #define IWDG_RLR_RL_Pos (0U) macro
4279 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
Dstm32f100xb.h4683 #define IWDG_RLR_RL_Pos (0U) macro
4684 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
Dstm32f102x6.h4265 #define IWDG_RLR_RL_Pos (0U) macro
4266 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h2665 #define IWDG_RLR_RL_Pos (0U) macro
2666 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
Dstm32f030x8.h2695 #define IWDG_RLR_RL_Pos (0U) macro
2696 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
Dstm32f070x6.h2718 #define IWDG_RLR_RL_Pos (0U) macro
2719 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
Dstm32f031x6.h2764 #define IWDG_RLR_RL_Pos (0U) macro
2765 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
Dstm32f030xc.h2946 #define IWDG_RLR_RL_Pos (0U) macro
2947 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
Dstm32f038xx.h2763 #define IWDG_RLR_RL_Pos (0U) macro
2764 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
Dstm32f070xb.h2798 #define IWDG_RLR_RL_Pos (0U) macro
2799 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h3005 #define IWDG_RLR_RL_Pos (0U) macro
3006 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
Dstm32l010x8.h2738 #define IWDG_RLR_RL_Pos (0U) macro
2739 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
Dstm32l010xb.h2746 #define IWDG_RLR_RL_Pos (0U) macro
2747 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
Dstm32l011xx.h2811 #define IWDG_RLR_RL_Pos (0U) macro
2812 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
Dstm32l021xx.h2939 #define IWDG_RLR_RL_Pos (0U) macro
2940 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
Dstm32l031xx.h2877 #define IWDG_RLR_RL_Pos (0U) macro
2878 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
Dstm32l051xx.h2918 #define IWDG_RLR_RL_Pos (0U) macro
2919 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
Dstm32l010x4.h2730 #define IWDG_RLR_RL_Pos (0U) macro
2731 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
Dstm32l010x6.h2736 #define IWDG_RLR_RL_Pos (0U) macro
2737 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
Dstm32l081xx.h3092 #define IWDG_RLR_RL_Pos (0U) macro
3093 #define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */

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