Lines Matching refs:IWDG_RLR_RL_Pos
1666 #define IWDG_RLR_RL_Pos (0UL) /*!< IWDG RLR: RL (Bit 0) … macro
1669 #define IWDG_RLR_RL_0 (0x1U << IWDG_RLR_RL_Pos)
1670 #define IWDG_RLR_RL_1 (0x2U << IWDG_RLR_RL_Pos)
1671 #define IWDG_RLR_RL_2 (0x4U << IWDG_RLR_RL_Pos)
1672 #define IWDG_RLR_RL_3 (0x8U << IWDG_RLR_RL_Pos)
1673 #define IWDG_RLR_RL_4 (0x10U << IWDG_RLR_RL_Pos)
1674 #define IWDG_RLR_RL_5 (0x20U << IWDG_RLR_RL_Pos)
1675 #define IWDG_RLR_RL_6 (0x40U << IWDG_RLR_RL_Pos)
1676 #define IWDG_RLR_RL_7 (0x80U << IWDG_RLR_RL_Pos)
1677 #define IWDG_RLR_RL_8 (0x100U << IWDG_RLR_RL_Pos)
1678 #define IWDG_RLR_RL_9 (0x200U << IWDG_RLR_RL_Pos)
1679 #define IWDG_RLR_RL_10 (0x400U << IWDG_RLR_RL_Pos)
1680 #define IWDG_RLR_RL_11 (0x800U << IWDG_RLR_RL_Pos)