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Searched refs:IOPENR (Results 1 – 25 of 49) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_hal_rcc.h718 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN);\
720 tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN);\
726 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOBEN);\
728 tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOBEN);\
734 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN);\
736 tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN);\
742 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOHEN);\
744 tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOHEN);\
749 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN)
750 #define __HAL_RCC_GPIOB_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOBEN)
[all …]
Dstm32l0xx_ll_bus.h988 SET_BIT(RCC->IOPENR, Periphs); in LL_IOP_GRP1_EnableClock()
990 tmpreg = READ_BIT(RCC->IOPENR, Periphs); in LL_IOP_GRP1_EnableClock()
1015 return ((READ_BIT(RCC->IOPENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_IOP_GRP1_IsEnabledClock()
1039 CLEAR_BIT(RCC->IOPENR, Periphs); in LL_IOP_GRP1_DisableClock()
Dstm32l0xx_hal_rcc_ex.h635 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOEEN);\
637 tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOEEN);\
641 #define __HAL_RCC_GPIOE_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR,(RCC_IOPENR_GPIOEEN))
643 #define __HAL_RCC_GPIOE_IS_CLK_ENABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOEEN) != 0U)
644 #define __HAL_RCC_GPIOE_IS_CLK_DISABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOEEN) == 0U)
650 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN);\
652 tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN);\
655 #define __HAL_RCC_GPIOD_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR,(RCC_IOPENR_GPIODEN))
657 #define __HAL_RCC_GPIOD_IS_CLK_ENABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN) != 0U)
658 #define __HAL_RCC_GPIOD_IS_CLK_DISABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN) == 0U)
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_rcc.h739 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN); \
741 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN); \
747 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOBEN); \
749 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOBEN); \
755 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN); \
757 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN); \
763 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN); \
765 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN); \
771 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOFEN); \
773 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOFEN); \
[all …]
Dstm32c0xx_ll_bus.h770 SET_BIT(RCC->IOPENR, Periphs); in LL_IOP_GRP1_EnableClock()
772 tmpreg = READ_BIT(RCC->IOPENR, Periphs); in LL_IOP_GRP1_EnableClock()
793 return ((READ_BIT(RCC->IOPENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_IOP_GRP1_IsEnabledClock()
813 CLEAR_BIT(RCC->IOPENR, Periphs); in LL_IOP_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h941 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN); \
943 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN); \
949 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOBEN); \
951 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOBEN); \
957 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN); \
959 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN); \
965 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN); \
967 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN); \
974 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOEEN); \
976 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOEEN); \
[all …]
Dstm32g0xx_ll_bus.h1138 SET_BIT(RCC->IOPENR, Periphs); in LL_IOP_GRP1_EnableClock()
1140 tmpreg = READ_BIT(RCC->IOPENR, Periphs); in LL_IOP_GRP1_EnableClock()
1163 return ((READ_BIT(RCC->IOPENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_IOP_GRP1_IsEnabledClock()
1185 CLEAR_BIT(RCC->IOPENR, Periphs); in LL_IOP_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc.h786 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN); \
788 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN); \
794 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOBEN); \
796 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOBEN); \
802 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN); \
804 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN); \
810 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN); \
812 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN); \
819 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOEEN); \
821 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOEEN); \
[all …]
Dstm32u0xx_ll_bus.h1161 SET_BIT(RCC->IOPENR, Periphs); in LL_IOP_GRP1_EnableClock()
1163 tmpreg = READ_BIT(RCC->IOPENR, Periphs); in LL_IOP_GRP1_EnableClock()
1184 return ((READ_BIT(RCC->IOPENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_IOP_GRP1_IsEnabledClock()
1204 CLEAR_BIT(RCC->IOPENR, Periphs); in LL_IOP_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/src/
Dstm32c0xx_hal_rcc.c873 SET_BIT(RCC->IOPENR, (1UL << mco_gpio_index)); in HAL_RCC_MCOConfig()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_hal_rcc.c1063 SET_BIT(RCC->IOPENR, (1UL << mco_gpio_index )); in HAL_RCC_MCOConfig()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_hal_rcc.c1131 SET_BIT(RCC->IOPENR, (1UL << mco_gpio_index)); in HAL_RCC_MCOConfig()
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h374 …__IO uint32_t IOPENR; /*!< RCC Clock IO port enable register, Ad… member
Dstm32l010x8.h339 …__IO uint32_t IOPENR; /*!< RCC Clock IO port enable register, Ad… member
Dstm32l010xb.h340 …__IO uint32_t IOPENR; /*!< RCC Clock IO port enable register, Ad… member
Dstm32l011xx.h354 …__IO uint32_t IOPENR; /*!< RCC Clock IO port enable register, Ad… member
Dstm32l021xx.h373 …__IO uint32_t IOPENR; /*!< RCC Clock IO port enable register, Ad… member
Dstm32l031xx.h355 …__IO uint32_t IOPENR; /*!< RCC Clock IO port enable register, Ad… member
Dstm32l051xx.h376 …__IO uint32_t IOPENR; /*!< RCC Clock IO port enable register, Ad… member
Dstm32l010x4.h339 …__IO uint32_t IOPENR; /*!< RCC Clock IO port enable register, Ad… member
Dstm32l010x6.h339 …__IO uint32_t IOPENR; /*!< RCC Clock IO port enable register, Ad… member
Dstm32l081xx.h403 …__IO uint32_t IOPENR; /*!< RCC Clock IO port enable register, Ad… member
Dstm32l071xx.h384 …__IO uint32_t IOPENR; /*!< RCC Clock IO port enable register, Ad… member
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h353 …__IO uint32_t IOPENR; /*!< RCC IO port enable register, … member
Dstm32c031xx.h355 …__IO uint32_t IOPENR; /*!< RCC IO port enable register, … member

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