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Searched refs:I2C_OAR2_OA2MASK05_Pos (Results 1 – 25 of 215) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h2502 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
2503 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32f030x8.h2532 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
2533 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32f070x6.h2555 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
2556 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32f031x6.h2601 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
2602 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32f030xc.h2783 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
2784 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32f038xx.h2600 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
2601 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32f070xb.h2635 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
2636 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32f058xx.h3049 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
3050 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32f051x8.h3050 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
3051 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h2842 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
2843 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32l010x8.h2575 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
2576 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32l010xb.h2583 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
2584 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32l011xx.h2648 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
2649 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32l021xx.h2776 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
2777 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32l031xx.h2714 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
2715 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32l051xx.h2755 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
2756 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32l010x4.h2567 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
2568 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32l010x6.h2573 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
2574 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32l081xx.h2929 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
2930 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32l071xx.h2801 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
2802 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32l052xx.h3044 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
3045 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32l062xx.h3172 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
3173 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32l053xx.h3066 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
3067 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h3335 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
3336 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */
Dstm32c031xx.h3342 #define I2C_OAR2_OA2MASK05_Pos (8U) macro
3343 #define I2C_OAR2_OA2MASK05_Msk (0x5UL << I2C_OAR2_OA2MASK05_Pos) /*!< 0x00000500 */

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