Home
last modified time | relevance | path

Searched refs:I2C_OAR2_OA2MASK04_Pos (Results 1 – 25 of 215) sorted by relevance

123456789

/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h2499 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
2500 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32f030x8.h2529 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
2530 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32f070x6.h2552 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
2553 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32f031x6.h2598 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
2599 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32f030xc.h2780 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
2781 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32f038xx.h2597 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
2598 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32f070xb.h2632 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
2633 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32f058xx.h3046 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
3047 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32f051x8.h3047 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
3048 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h2839 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
2840 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32l010x8.h2572 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
2573 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32l010xb.h2580 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
2581 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32l011xx.h2645 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
2646 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32l021xx.h2773 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
2774 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32l031xx.h2711 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
2712 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32l051xx.h2752 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
2753 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32l010x4.h2564 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
2565 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32l010x6.h2570 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
2571 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32l081xx.h2926 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
2927 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32l071xx.h2798 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
2799 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32l052xx.h3041 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
3042 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32l062xx.h3169 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
3170 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32l053xx.h3063 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
3064 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h3332 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
3333 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */
Dstm32c031xx.h3339 #define I2C_OAR2_OA2MASK04_Pos (10U) macro
3340 #define I2C_OAR2_OA2MASK04_Msk (0x1UL << I2C_OAR2_OA2MASK04_Pos) /*!< 0x00000400 */

123456789