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Searched refs:I2C_CR1_ADDRIE (Results 1 – 25 of 274) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_i2c.h156 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1076 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1087 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1098 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_i2c.h168 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1355 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1366 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1377 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_i2c.h168 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1355 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1366 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1377 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
Dstm32wlxx_hal_smbus.h370 #define SMBUS_IT_ADDRI I2C_CR1_ADDRIE
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_i2c.h168 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1456 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1467 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1478 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_i2c.h168 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1355 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1366 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1377 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_i2c.h168 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1355 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1366 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1377 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
Dstm32l0xx_hal_smbus.h370 #define SMBUS_IT_ADDRI I2C_CR1_ADDRIE
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_i2c.h168 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1357 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1368 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1379 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
Dstm32f0xx_hal_smbus.h368 #define SMBUS_IT_ADDRI I2C_CR1_ADDRIE
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_i2c.h168 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1357 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1368 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1379 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_i2c.h168 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1315 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1326 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1337 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_i2c.h168 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1355 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1366 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1377 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_ll_i2c.h168 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1315 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1326 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1337 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_i2c.h160 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1448 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1459 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1470 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_i2c.h168 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1355 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1366 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1377 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_i2c.h168 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1355 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1366 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1377 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_i2c.h168 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1355 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1366 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1377 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_i2c.h168 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1355 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1366 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1377 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_i2c.h168 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1456 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1467 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1478 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
Dstm32n6xx_hal_smbus.h367 #define SMBUS_IT_ADDRI I2C_CR1_ADDRIE
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_i2c.h168 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1355 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1366 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1377 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_i2c.h169 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1527 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1538 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1549 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_i2c.h171 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt en…
1539 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_EnableIT_ADDR()
1550 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); in LL_I2C_DisableIT_ADDR()
1561 return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL); in LL_I2C_IsEnabledIT_ADDR()
Dstm32wbaxx_hal_smbus.h369 #define SMBUS_IT_ADDRI I2C_CR1_ADDRIE

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