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Searched refs:GTZC_TZSC_MPCWM_CFGR_SEC_Pos (Results 1 – 19 of 19) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_gtzc.c646 reg_value = (pMPCWM_Desc->Attribute << GTZC_TZSC_MPCWM_CFGR_SEC_Pos) | \ in HAL_GTZC_TZSC_MPCWM_ConfigMemAttributes()
730 … GTZC_TZSC_MPCWM_CFGR_SEC)) >> GTZC_TZSC_MPCWM_CFGR_SEC_Pos; in HAL_GTZC_TZSC_MPCWM_GetConfigMemAttributes()
760 … GTZC_TZSC_MPCWM_CFGR_SEC)) >> GTZC_TZSC_MPCWM_CFGR_SEC_Pos; in HAL_GTZC_TZSC_MPCWM_GetConfigMemAttributes()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_gtzc.c697 reg_value = (pMPCWM_Desc->Attribute << GTZC_TZSC_MPCWM_CFGR_SEC_Pos) | \ in HAL_GTZC_TZSC_MPCWM_ConfigMemAttributes()
774 … GTZC_TZSC_MPCWM_CFGR_SEC)) >> GTZC_TZSC_MPCWM_CFGR_SEC_Pos; in HAL_GTZC_TZSC_MPCWM_GetConfigMemAttributes()
791 … GTZC_TZSC_MPCWM_CFGR_SEC)) >> GTZC_TZSC_MPCWM_CFGR_SEC_Pos; in HAL_GTZC_TZSC_MPCWM_GetConfigMemAttributes()
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h15718 #define GTZC_TZSC_MPCWM_CFGR_SEC_Pos (8U) macro
15719 #define GTZC_TZSC_MPCWM_CFGR_SEC_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_SEC_Pos)
Dstm32h562xx.h17034 #define GTZC_TZSC_MPCWM_CFGR_SEC_Pos (8U) macro
17035 #define GTZC_TZSC_MPCWM_CFGR_SEC_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_SEC_Pos)
Dstm32h533xx.h16267 #define GTZC_TZSC_MPCWM_CFGR_SEC_Pos (8U) macro
16268 #define GTZC_TZSC_MPCWM_CFGR_SEC_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_SEC_Pos)
Dstm32h573xx.h19679 #define GTZC_TZSC_MPCWM_CFGR_SEC_Pos (8U) macro
19680 #define GTZC_TZSC_MPCWM_CFGR_SEC_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_SEC_Pos)
Dstm32h563xx.h19130 #define GTZC_TZSC_MPCWM_CFGR_SEC_Pos (8U) macro
19131 #define GTZC_TZSC_MPCWM_CFGR_SEC_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_SEC_Pos)
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h18358 #define GTZC_TZSC_MPCWM_CFGR_SEC_Pos (8U) macro
18359 #define GTZC_TZSC_MPCWM_CFGR_SEC_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_SEC_Pos)
Dstm32u535xx.h17806 #define GTZC_TZSC_MPCWM_CFGR_SEC_Pos (8U) macro
17807 #define GTZC_TZSC_MPCWM_CFGR_SEC_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_SEC_Pos)
Dstm32u575xx.h19399 #define GTZC_TZSC_MPCWM_CFGR_SEC_Pos (8U) macro
19400 #define GTZC_TZSC_MPCWM_CFGR_SEC_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_SEC_Pos)
Dstm32u585xx.h20009 #define GTZC_TZSC_MPCWM_CFGR_SEC_Pos (8U) macro
20010 #define GTZC_TZSC_MPCWM_CFGR_SEC_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_SEC_Pos)
Dstm32u595xx.h20572 #define GTZC_TZSC_MPCWM_CFGR_SEC_Pos (8U) macro
20573 #define GTZC_TZSC_MPCWM_CFGR_SEC_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_SEC_Pos)
Dstm32u5a5xx.h21182 #define GTZC_TZSC_MPCWM_CFGR_SEC_Pos (8U) macro
21183 #define GTZC_TZSC_MPCWM_CFGR_SEC_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_SEC_Pos)
Dstm32u5f7xx.h22165 #define GTZC_TZSC_MPCWM_CFGR_SEC_Pos (8U) macro
22166 #define GTZC_TZSC_MPCWM_CFGR_SEC_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_SEC_Pos)
Dstm32u599xx.h24346 #define GTZC_TZSC_MPCWM_CFGR_SEC_Pos (8U) macro
24347 #define GTZC_TZSC_MPCWM_CFGR_SEC_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_SEC_Pos)
Dstm32u5g7xx.h22775 #define GTZC_TZSC_MPCWM_CFGR_SEC_Pos (8U) macro
22776 #define GTZC_TZSC_MPCWM_CFGR_SEC_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_SEC_Pos)
Dstm32u5f9xx.h25306 #define GTZC_TZSC_MPCWM_CFGR_SEC_Pos (8U) macro
25307 #define GTZC_TZSC_MPCWM_CFGR_SEC_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_SEC_Pos)
Dstm32u5a9xx.h24956 #define GTZC_TZSC_MPCWM_CFGR_SEC_Pos (8U) macro
24957 #define GTZC_TZSC_MPCWM_CFGR_SEC_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_SEC_Pos)
Dstm32u5g9xx.h25916 #define GTZC_TZSC_MPCWM_CFGR_SEC_Pos (8U) macro
25917 #define GTZC_TZSC_MPCWM_CFGR_SEC_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_SEC_Pos)