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Searched refs:GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (Results 1 – 19 of 19) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_gtzc.c654 reg_value = (pMPCWM_Desc->Attribute << (GTZC_TZSC_MPCWM_CFGR_PRIV_Pos - 1U)) | \ in HAL_GTZC_TZSC_MPCWM_ConfigMemAttributes()
732 …esc[0].Attribute = (reg_value & GTZC_TZSC_MPCWM_CFGR_PRIV) >> (GTZC_TZSC_MPCWM_CFGR_PRIV_Pos - 1U); in HAL_GTZC_TZSC_MPCWM_GetConfigMemAttributes()
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h10816 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (9U) macro
10817 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_PRIV_Pos)
Dstm32h523xx.h15721 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (9U) macro
15722 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_PRIV_Pos)
Dstm32h562xx.h17037 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (9U) macro
17038 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_PRIV_Pos)
Dstm32h533xx.h16270 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (9U) macro
16271 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_PRIV_Pos)
Dstm32h573xx.h19682 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (9U) macro
19683 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_PRIV_Pos)
Dstm32h563xx.h19133 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (9U) macro
19134 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_PRIV_Pos)
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h18361 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (9U) macro
18362 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_PRIV_Pos)
Dstm32u535xx.h17809 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (9U) macro
17810 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_PRIV_Pos)
Dstm32u575xx.h19402 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (9U) macro
19403 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_PRIV_Pos)
Dstm32u585xx.h20012 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (9U) macro
20013 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_PRIV_Pos)
Dstm32u595xx.h20575 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (9U) macro
20576 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_PRIV_Pos)
Dstm32u5a5xx.h21185 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (9U) macro
21186 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_PRIV_Pos)
Dstm32u5f7xx.h22168 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (9U) macro
22169 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_PRIV_Pos)
Dstm32u599xx.h24349 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (9U) macro
24350 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_PRIV_Pos)
Dstm32u5g7xx.h22778 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (9U) macro
22779 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_PRIV_Pos)
Dstm32u5f9xx.h25309 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (9U) macro
25310 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_PRIV_Pos)
Dstm32u5a9xx.h24959 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (9U) macro
24960 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_PRIV_Pos)
Dstm32u5g9xx.h25919 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Pos (9U) macro
25920 #define GTZC_TZSC_MPCWM_CFGR_PRIV_Msk (0x1UL << GTZC_TZSC_MPCWM_CFGR_PRIV_Pos)