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Searched refs:GTZC_CFGR3_SDMMC2_Msk (Results 1 – 12 of 12) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u575xx.h19511 #define GTZC_CFGR3_SDMMC2_Msk (0x01UL << GTZC_CFGR3_SDMMC2_Pos) macro
19697 #define GTZC_TZSC1_SECCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
19827 #define GTZC_TZSC1_PRIVCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
19957 #define GTZC_TZIC1_IER3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
20143 #define GTZC_TZIC1_SR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
20329 #define GTZC_TZIC1_FCR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
Dstm32u585xx.h20127 #define GTZC_CFGR3_SDMMC2_Msk (0x01UL << GTZC_CFGR3_SDMMC2_Pos) macro
20323 #define GTZC_TZSC1_SECCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
20459 #define GTZC_TZSC1_PRIVCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
20595 #define GTZC_TZIC1_IER3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
20791 #define GTZC_TZIC1_SR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
20987 #define GTZC_TZIC1_FCR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
Dstm32u595xx.h20692 #define GTZC_CFGR3_SDMMC2_Msk (0x01UL << GTZC_CFGR3_SDMMC2_Pos) macro
20894 #define GTZC_TZSC1_SECCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
21034 #define GTZC_TZSC1_PRIVCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
21174 #define GTZC_TZIC1_IER3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
21376 #define GTZC_TZIC1_SR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
21578 #define GTZC_TZIC1_FCR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
Dstm32u5a5xx.h21308 #define GTZC_CFGR3_SDMMC2_Msk (0x01UL << GTZC_CFGR3_SDMMC2_Pos) macro
21520 #define GTZC_TZSC1_SECCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
21666 #define GTZC_TZSC1_PRIVCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
21812 #define GTZC_TZIC1_IER3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
22024 #define GTZC_TZIC1_SR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
22236 #define GTZC_TZIC1_FCR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
Dstm32u5f7xx.h22287 #define GTZC_CFGR3_SDMMC2_Msk (0x01UL << GTZC_CFGR3_SDMMC2_Pos) macro
22505 #define GTZC_TZSC1_SECCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
22657 #define GTZC_TZSC1_PRIVCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
22809 #define GTZC_TZIC1_IER3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
23027 #define GTZC_TZIC1_SR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
23245 #define GTZC_TZIC1_FCR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
Dstm32u599xx.h24468 #define GTZC_CFGR3_SDMMC2_Msk (0x01UL << GTZC_CFGR3_SDMMC2_Pos) macro
24680 #define GTZC_TZSC1_SECCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
24830 #define GTZC_TZSC1_PRIVCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
24980 #define GTZC_TZIC1_IER3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
25192 #define GTZC_TZIC1_SR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
25404 #define GTZC_TZIC1_FCR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
Dstm32u5g7xx.h22903 #define GTZC_CFGR3_SDMMC2_Msk (0x01UL << GTZC_CFGR3_SDMMC2_Pos) macro
23131 #define GTZC_TZSC1_SECCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
23289 #define GTZC_TZSC1_PRIVCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
23447 #define GTZC_TZIC1_IER3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
23675 #define GTZC_TZIC1_SR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
23903 #define GTZC_TZIC1_FCR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
Dstm32u5f9xx.h25430 #define GTZC_CFGR3_SDMMC2_Msk (0x01UL << GTZC_CFGR3_SDMMC2_Pos) macro
25650 #define GTZC_TZSC1_SECCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
25804 #define GTZC_TZSC1_PRIVCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
25958 #define GTZC_TZIC1_IER3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
26178 #define GTZC_TZIC1_SR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
26398 #define GTZC_TZIC1_FCR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
Dstm32u5a9xx.h25084 #define GTZC_CFGR3_SDMMC2_Msk (0x01UL << GTZC_CFGR3_SDMMC2_Pos) macro
25306 #define GTZC_TZSC1_SECCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
25462 #define GTZC_TZSC1_PRIVCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
25618 #define GTZC_TZIC1_IER3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
25840 #define GTZC_TZIC1_SR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
26062 #define GTZC_TZIC1_FCR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
Dstm32u5g9xx.h26046 #define GTZC_CFGR3_SDMMC2_Msk (0x01UL << GTZC_CFGR3_SDMMC2_Pos) macro
26276 #define GTZC_TZSC1_SECCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
26436 #define GTZC_TZSC1_PRIVCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
26596 #define GTZC_TZIC1_IER3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
26826 #define GTZC_TZIC1_SR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
27056 #define GTZC_TZIC1_FCR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h573xx.h19845 #define GTZC_CFGR3_SDMMC2_Msk (0x01UL << GTZC_CFGR3_SDMMC2_Pos) macro
20048 #define GTZC_TZSC1_SECCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
20205 #define GTZC_TZSC1_PRIVCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
20361 #define GTZC_TZIC1_IER3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
20563 #define GTZC_TZIC1_SR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
20765 #define GTZC_TZIC1_FCR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
Dstm32h563xx.h19290 #define GTZC_CFGR3_SDMMC2_Msk (0x01UL << GTZC_CFGR3_SDMMC2_Pos) macro
19485 #define GTZC_TZSC1_SECCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
19636 #define GTZC_TZSC1_PRIVCFGR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
19786 #define GTZC_TZIC1_IER3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
19980 #define GTZC_TZIC1_SR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk
20174 #define GTZC_TZIC1_FCR3_SDMMC2_Msk GTZC_CFGR3_SDMMC2_Msk