/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/ |
D | stm32wbaxx_hal_gtzc.h | 204 #define GTZC_PERIPH_RAMCFG (GTZC_PERIPH_REG3 | GTZC_CFGR3_RAMCFG_Pos)
|
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/ |
D | stm32h5xx_hal_gtzc.h | 360 #define GTZC_PERIPH_RAMCFG (GTZC1_PERIPH_REG3 | GTZC_CFGR3_RAMCFG_Pos)
|
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/ |
D | stm32u5xx_hal_gtzc.h | 283 #define GTZC_PERIPH_RAMCFG (GTZC1_PERIPH_REG3 | GTZC_CFGR3_RAMCFG_Pos)
|
/hal_stm32-latest/stm32cube/stm32h5xx/soc/ |
D | stm32h523xx.h | 15839 #define GTZC_CFGR3_RAMCFG_Pos (26U) macro 15840 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos) 15990 #define GTZC_TZSC1_SECCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 16097 #define GTZC_TZSC1_PRIVCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 16203 #define GTZC_TZIC1_IER3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 16353 #define GTZC_TZIC1_SR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 16503 #define GTZC_TZIC1_FCR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos
|
D | stm32h562xx.h | 17193 #define GTZC_CFGR3_RAMCFG_Pos (26U) macro 17194 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos) 17382 #define GTZC_TZSC1_SECCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 17527 #define GTZC_TZSC1_PRIVCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 17671 #define GTZC_TZIC1_IER3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 17859 #define GTZC_TZIC1_SR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 18047 #define GTZC_TZIC1_FCR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos
|
D | stm32h533xx.h | 16394 #define GTZC_CFGR3_RAMCFG_Pos (26U) macro 16395 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos) 16553 #define GTZC_TZSC1_SECCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 16666 #define GTZC_TZSC1_PRIVCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 16778 #define GTZC_TZIC1_IER3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 16936 #define GTZC_TZIC1_SR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 17094 #define GTZC_TZIC1_FCR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos
|
D | stm32h573xx.h | 19850 #define GTZC_CFGR3_RAMCFG_Pos (26U) macro 19851 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos) 20053 #define GTZC_TZSC1_SECCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 20210 #define GTZC_TZSC1_PRIVCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 20366 #define GTZC_TZIC1_IER3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 20568 #define GTZC_TZIC1_SR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 20770 #define GTZC_TZIC1_FCR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos
|
D | stm32h563xx.h | 19295 #define GTZC_CFGR3_RAMCFG_Pos (26U) macro 19296 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos) 19490 #define GTZC_TZSC1_SECCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 19641 #define GTZC_TZSC1_PRIVCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 19791 #define GTZC_TZIC1_IER3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 19985 #define GTZC_TZIC1_SR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 20179 #define GTZC_TZIC1_FCR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos
|
D | stm32h503xx.h | 10899 #define GTZC_CFGR3_RAMCFG_Pos (26U) macro 10900 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos) 11000 #define GTZC_TZSC1_PRIVCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos
|
/hal_stm32-latest/stm32cube/stm32u5xx/soc/ |
D | stm32u545xx.h | 18467 #define GTZC_CFGR3_RAMCFG_Pos (22U) macro 18468 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos) 18639 #define GTZC_TZSC1_SECCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 18759 #define GTZC_TZSC1_PRIVCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 18879 #define GTZC_TZIC1_IER3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 19049 #define GTZC_TZIC1_SR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 19217 #define GTZC_TZIC1_FCR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos
|
D | stm32u535xx.h | 17909 #define GTZC_CFGR3_RAMCFG_Pos (22U) macro 17910 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos) 18073 #define GTZC_TZSC1_SECCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 18187 #define GTZC_TZSC1_PRIVCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 18301 #define GTZC_TZIC1_IER3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 18463 #define GTZC_TZIC1_SR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 18623 #define GTZC_TZIC1_FCR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos
|
D | stm32u575xx.h | 19518 #define GTZC_CFGR3_RAMCFG_Pos (22U) macro 19519 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos) 19704 #define GTZC_TZSC1_SECCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 19834 #define GTZC_TZSC1_PRIVCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 19964 #define GTZC_TZIC1_IER3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 20150 #define GTZC_TZIC1_SR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 20336 #define GTZC_TZIC1_FCR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos
|
D | stm32u585xx.h | 20134 #define GTZC_CFGR3_RAMCFG_Pos (22U) macro 20135 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos) 20330 #define GTZC_TZSC1_SECCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 20466 #define GTZC_TZSC1_PRIVCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 20602 #define GTZC_TZIC1_IER3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 20798 #define GTZC_TZIC1_SR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 20994 #define GTZC_TZIC1_FCR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos
|
D | stm32u595xx.h | 20699 #define GTZC_CFGR3_RAMCFG_Pos (22U) macro 20700 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos) 20901 #define GTZC_TZSC1_SECCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 21041 #define GTZC_TZSC1_PRIVCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 21181 #define GTZC_TZIC1_IER3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 21383 #define GTZC_TZIC1_SR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 21585 #define GTZC_TZIC1_FCR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos
|
D | stm32u5a5xx.h | 21315 #define GTZC_CFGR3_RAMCFG_Pos (22U) macro 21316 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos) 21527 #define GTZC_TZSC1_SECCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 21673 #define GTZC_TZSC1_PRIVCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 21819 #define GTZC_TZIC1_IER3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 22031 #define GTZC_TZIC1_SR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 22243 #define GTZC_TZIC1_FCR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos
|
D | stm32u5f7xx.h | 22294 #define GTZC_CFGR3_RAMCFG_Pos (22U) macro 22295 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos) 22512 #define GTZC_TZSC1_SECCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 22664 #define GTZC_TZSC1_PRIVCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 22816 #define GTZC_TZIC1_IER3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 23034 #define GTZC_TZIC1_SR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 23252 #define GTZC_TZIC1_FCR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos
|
D | stm32u599xx.h | 24475 #define GTZC_CFGR3_RAMCFG_Pos (22U) macro 24476 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos) 24687 #define GTZC_TZSC1_SECCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 24837 #define GTZC_TZSC1_PRIVCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 24987 #define GTZC_TZIC1_IER3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 25199 #define GTZC_TZIC1_SR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 25411 #define GTZC_TZIC1_FCR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos
|
D | stm32u5g7xx.h | 22910 #define GTZC_CFGR3_RAMCFG_Pos (22U) macro 22911 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos) 23138 #define GTZC_TZSC1_SECCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 23296 #define GTZC_TZSC1_PRIVCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 23454 #define GTZC_TZIC1_IER3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 23682 #define GTZC_TZIC1_SR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 23910 #define GTZC_TZIC1_FCR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos
|
D | stm32u5f9xx.h | 25437 #define GTZC_CFGR3_RAMCFG_Pos (22U) macro 25438 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos) 25657 #define GTZC_TZSC1_SECCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 25811 #define GTZC_TZSC1_PRIVCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 25965 #define GTZC_TZIC1_IER3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 26185 #define GTZC_TZIC1_SR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 26405 #define GTZC_TZIC1_FCR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos
|
D | stm32u5a9xx.h | 25091 #define GTZC_CFGR3_RAMCFG_Pos (22U) macro 25092 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos) 25313 #define GTZC_TZSC1_SECCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 25469 #define GTZC_TZSC1_PRIVCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 25625 #define GTZC_TZIC1_IER3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 25847 #define GTZC_TZIC1_SR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 26069 #define GTZC_TZIC1_FCR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos
|
D | stm32u5g9xx.h | 26053 #define GTZC_CFGR3_RAMCFG_Pos (22U) macro 26054 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos) 26283 #define GTZC_TZSC1_SECCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 26443 #define GTZC_TZSC1_PRIVCFGR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 26603 #define GTZC_TZIC1_IER3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 26833 #define GTZC_TZIC1_SR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos 27063 #define GTZC_TZIC1_FCR3_RAMCFG_Pos GTZC_CFGR3_RAMCFG_Pos
|
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/ |
D | stm32wba52xx.h | 5678 #define GTZC_CFGR3_RAMCFG_Pos GTZC_TZSC_SECCFGR3_RAMCFGSEC_Pos macro 5679 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos)
|
D | stm32wba54xx.h | 5865 #define GTZC_CFGR3_RAMCFG_Pos GTZC_TZSC_SECCFGR3_RAMCFGSEC_Pos macro 5866 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos)
|
D | stm32wba5mxx.h | 5865 #define GTZC_CFGR3_RAMCFG_Pos GTZC_TZSC_SECCFGR3_RAMCFGSEC_Pos macro 5866 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos)
|
D | stm32wba55xx.h | 5865 #define GTZC_CFGR3_RAMCFG_Pos GTZC_TZSC_SECCFGR3_RAMCFGSEC_Pos macro 5866 #define GTZC_CFGR3_RAMCFG_Msk (0x01UL << GTZC_CFGR3_RAMCFG_Pos)
|