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Searched refs:GTZC_CFGR3_DMA2D_Pos (Results 1 – 11 of 11) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_gtzc.h249 #define GTZC_PERIPH_DMA2D (GTZC1_PERIPH_REG3 | GTZC_CFGR3_DMA2D_Pos)
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u575xx.h19490 #define GTZC_CFGR3_DMA2D_Pos (5U) macro
19491 #define GTZC_CFGR3_DMA2D_Msk (0x01UL << GTZC_CFGR3_DMA2D_Pos)
19676 #define GTZC_TZSC1_SECCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
19806 #define GTZC_TZSC1_PRIVCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
19936 #define GTZC_TZIC1_IER3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
20122 #define GTZC_TZIC1_SR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
20308 #define GTZC_TZIC1_FCR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
Dstm32u585xx.h20100 #define GTZC_CFGR3_DMA2D_Pos (5U) macro
20101 #define GTZC_CFGR3_DMA2D_Msk (0x01UL << GTZC_CFGR3_DMA2D_Pos)
20296 #define GTZC_TZSC1_SECCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
20432 #define GTZC_TZSC1_PRIVCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
20568 #define GTZC_TZIC1_IER3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
20764 #define GTZC_TZIC1_SR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
20960 #define GTZC_TZIC1_FCR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
Dstm32u595xx.h20671 #define GTZC_CFGR3_DMA2D_Pos (5U) macro
20672 #define GTZC_CFGR3_DMA2D_Msk (0x01UL << GTZC_CFGR3_DMA2D_Pos)
20873 #define GTZC_TZSC1_SECCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
21013 #define GTZC_TZSC1_PRIVCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
21153 #define GTZC_TZIC1_IER3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
21355 #define GTZC_TZIC1_SR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
21557 #define GTZC_TZIC1_FCR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
Dstm32u5a5xx.h21281 #define GTZC_CFGR3_DMA2D_Pos (5U) macro
21282 #define GTZC_CFGR3_DMA2D_Msk (0x01UL << GTZC_CFGR3_DMA2D_Pos)
21493 #define GTZC_TZSC1_SECCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
21639 #define GTZC_TZSC1_PRIVCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
21785 #define GTZC_TZIC1_IER3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
21997 #define GTZC_TZIC1_SR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
22209 #define GTZC_TZIC1_FCR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
Dstm32u5f7xx.h22266 #define GTZC_CFGR3_DMA2D_Pos (5U) macro
22267 #define GTZC_CFGR3_DMA2D_Msk (0x01UL << GTZC_CFGR3_DMA2D_Pos)
22484 #define GTZC_TZSC1_SECCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
22636 #define GTZC_TZSC1_PRIVCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
22788 #define GTZC_TZIC1_IER3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
23006 #define GTZC_TZIC1_SR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
23224 #define GTZC_TZIC1_FCR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
Dstm32u599xx.h24447 #define GTZC_CFGR3_DMA2D_Pos (5U) macro
24448 #define GTZC_CFGR3_DMA2D_Msk (0x01UL << GTZC_CFGR3_DMA2D_Pos)
24659 #define GTZC_TZSC1_SECCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
24809 #define GTZC_TZSC1_PRIVCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
24959 #define GTZC_TZIC1_IER3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
25171 #define GTZC_TZIC1_SR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
25383 #define GTZC_TZIC1_FCR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
Dstm32u5g7xx.h22876 #define GTZC_CFGR3_DMA2D_Pos (5U) macro
22877 #define GTZC_CFGR3_DMA2D_Msk (0x01UL << GTZC_CFGR3_DMA2D_Pos)
23104 #define GTZC_TZSC1_SECCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
23262 #define GTZC_TZSC1_PRIVCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
23420 #define GTZC_TZIC1_IER3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
23648 #define GTZC_TZIC1_SR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
23876 #define GTZC_TZIC1_FCR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
Dstm32u5f9xx.h25409 #define GTZC_CFGR3_DMA2D_Pos (5U) macro
25410 #define GTZC_CFGR3_DMA2D_Msk (0x01UL << GTZC_CFGR3_DMA2D_Pos)
25629 #define GTZC_TZSC1_SECCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
25783 #define GTZC_TZSC1_PRIVCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
25937 #define GTZC_TZIC1_IER3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
26157 #define GTZC_TZIC1_SR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
26377 #define GTZC_TZIC1_FCR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
Dstm32u5a9xx.h25057 #define GTZC_CFGR3_DMA2D_Pos (5U) macro
25058 #define GTZC_CFGR3_DMA2D_Msk (0x01UL << GTZC_CFGR3_DMA2D_Pos)
25279 #define GTZC_TZSC1_SECCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
25435 #define GTZC_TZSC1_PRIVCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
25591 #define GTZC_TZIC1_IER3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
25813 #define GTZC_TZIC1_SR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
26035 #define GTZC_TZIC1_FCR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
Dstm32u5g9xx.h26019 #define GTZC_CFGR3_DMA2D_Pos (5U) macro
26020 #define GTZC_CFGR3_DMA2D_Msk (0x01UL << GTZC_CFGR3_DMA2D_Pos)
26249 #define GTZC_TZSC1_SECCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
26409 #define GTZC_TZSC1_PRIVCFGR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
26569 #define GTZC_TZIC1_IER3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
26799 #define GTZC_TZIC1_SR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos
27029 #define GTZC_TZIC1_FCR3_DMA2D_Pos GTZC_CFGR3_DMA2D_Pos