Home
last modified time | relevance | path

Searched refs:GTZC_CFGR2_TIM17_Pos (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_gtzc.h174 #define GTZC_PERIPH_TIM17 (GTZC_PERIPH_REG2 | GTZC_CFGR2_TIM17_Pos)
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_gtzc.h206 #define GTZC_PERIPH_TIM17 (GTZC_PERIPH_REG2 | GTZC_CFGR2_TIM17_Pos)
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_gtzc.h272 #define GTZC_PERIPH_TIM17 (GTZC1_PERIPH_REG2 | GTZC_CFGR2_TIM17_Pos)
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_gtzc.h229 #define GTZC_PERIPH_TIM17 (GTZC1_PERIPH_REG2 | GTZC_CFGR2_TIM17_Pos)
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h16463 #define GTZC_CFGR2_TIM17_Pos (4U) macro
16464 #define GTZC_CFGR2_TIM17_Msk ( 0x01UL << GTZC_CFGR2_TIM17_Pos )
16583 #define GTZC_TZSC_SECCFGR2_TIM17SEC_Pos GTZC_CFGR2_TIM17_Pos
16685 #define GTZC_TZSC_PRIVCFGR2_TIM17PRIV_Pos GTZC_CFGR2_TIM17_Pos
16807 #define GTZC_TZIC_IER2_TIM17IE_Pos GTZC_CFGR2_TIM17_Pos
16947 #define GTZC_TZIC_SR2_TIM17F_Pos GTZC_CFGR2_TIM17_Pos
17087 #define GTZC_TZIC_FCR2_TIM17FC_Pos GTZC_CFGR2_TIM17_Pos
Dstm32l562xx.h17208 #define GTZC_CFGR2_TIM17_Pos (4U) macro
17209 #define GTZC_CFGR2_TIM17_Msk ( 0x01UL << GTZC_CFGR2_TIM17_Pos )
17332 #define GTZC_TZSC_SECCFGR2_TIM17SEC_Pos GTZC_CFGR2_TIM17_Pos
17438 #define GTZC_TZSC_PRIVCFGR2_TIM17PRIV_Pos GTZC_CFGR2_TIM17_Pos
17566 #define GTZC_TZIC_IER2_TIM17IE_Pos GTZC_CFGR2_TIM17_Pos
17712 #define GTZC_TZIC_SR2_TIM17F_Pos GTZC_CFGR2_TIM17_Pos
17858 #define GTZC_TZIC_FCR2_TIM17FC_Pos GTZC_CFGR2_TIM17_Pos
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h18427 #define GTZC_CFGR2_TIM17_Pos (6U) macro
18428 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)
18599 #define GTZC_TZSC1_SECCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
18719 #define GTZC_TZSC1_PRIVCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
18839 #define GTZC_TZIC1_IER2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
19009 #define GTZC_TZIC1_SR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
19179 #define GTZC_TZIC1_FCR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
Dstm32u535xx.h17875 #define GTZC_CFGR2_TIM17_Pos (6U) macro
17876 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)
18039 #define GTZC_TZSC1_SECCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
18153 #define GTZC_TZSC1_PRIVCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
18267 #define GTZC_TZIC1_IER2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
18429 #define GTZC_TZIC1_SR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
18591 #define GTZC_TZIC1_FCR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
Dstm32u575xx.h19472 #define GTZC_CFGR2_TIM17_Pos (6U) macro
19473 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)
19658 #define GTZC_TZSC1_SECCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
19788 #define GTZC_TZSC1_PRIVCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
19918 #define GTZC_TZIC1_IER2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
20104 #define GTZC_TZIC1_SR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
20290 #define GTZC_TZIC1_FCR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
Dstm32u585xx.h20082 #define GTZC_CFGR2_TIM17_Pos (6U) macro
20083 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)
20278 #define GTZC_TZSC1_SECCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
20414 #define GTZC_TZSC1_PRIVCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
20550 #define GTZC_TZIC1_IER2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
20746 #define GTZC_TZIC1_SR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
20942 #define GTZC_TZIC1_FCR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
Dstm32u595xx.h20651 #define GTZC_CFGR2_TIM17_Pos (6U) macro
20652 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)
20853 #define GTZC_TZSC1_SECCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
20993 #define GTZC_TZSC1_PRIVCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
21133 #define GTZC_TZIC1_IER2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
21335 #define GTZC_TZIC1_SR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
21537 #define GTZC_TZIC1_FCR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
Dstm32u5a5xx.h21261 #define GTZC_CFGR2_TIM17_Pos (6U) macro
21262 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)
21473 #define GTZC_TZSC1_SECCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
21619 #define GTZC_TZSC1_PRIVCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
21765 #define GTZC_TZIC1_IER2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
21977 #define GTZC_TZIC1_SR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
22189 #define GTZC_TZIC1_FCR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
Dstm32u5f7xx.h22244 #define GTZC_CFGR2_TIM17_Pos (6U) macro
22245 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)
22462 #define GTZC_TZSC1_SECCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
22614 #define GTZC_TZSC1_PRIVCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
22766 #define GTZC_TZIC1_IER2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
22984 #define GTZC_TZIC1_SR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
23202 #define GTZC_TZIC1_FCR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
Dstm32u599xx.h24425 #define GTZC_CFGR2_TIM17_Pos (6U) macro
24426 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)
24637 #define GTZC_TZSC1_SECCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
24787 #define GTZC_TZSC1_PRIVCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
24937 #define GTZC_TZIC1_IER2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
25149 #define GTZC_TZIC1_SR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
25361 #define GTZC_TZIC1_FCR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
Dstm32u5g7xx.h22854 #define GTZC_CFGR2_TIM17_Pos (6U) macro
22855 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)
23082 #define GTZC_TZSC1_SECCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
23240 #define GTZC_TZSC1_PRIVCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
23398 #define GTZC_TZIC1_IER2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
23626 #define GTZC_TZIC1_SR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
23854 #define GTZC_TZIC1_FCR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
Dstm32u5f9xx.h25385 #define GTZC_CFGR2_TIM17_Pos (6U) macro
25386 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)
25605 #define GTZC_TZSC1_SECCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
25759 #define GTZC_TZSC1_PRIVCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
25913 #define GTZC_TZIC1_IER2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
26133 #define GTZC_TZIC1_SR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
26353 #define GTZC_TZIC1_FCR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
Dstm32u5a9xx.h25035 #define GTZC_CFGR2_TIM17_Pos (6U) macro
25036 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)
25257 #define GTZC_TZSC1_SECCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
25413 #define GTZC_TZSC1_PRIVCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
25569 #define GTZC_TZIC1_IER2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
25791 #define GTZC_TZIC1_SR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
26013 #define GTZC_TZIC1_FCR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
Dstm32u5g9xx.h25995 #define GTZC_CFGR2_TIM17_Pos (6U) macro
25996 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)
26225 #define GTZC_TZSC1_SECCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
26385 #define GTZC_TZSC1_PRIVCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
26545 #define GTZC_TZIC1_IER2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
26775 #define GTZC_TZIC1_SR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
27005 #define GTZC_TZIC1_FCR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h562xx.h17135 #define GTZC_CFGR2_TIM17_Pos (14U) macro
17136 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)
17324 #define GTZC_TZSC1_SECCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
17469 #define GTZC_TZSC1_PRIVCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
17613 #define GTZC_TZIC1_IER2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
17801 #define GTZC_TZIC1_SR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
17989 #define GTZC_TZIC1_FCR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
Dstm32h573xx.h19782 #define GTZC_CFGR2_TIM17_Pos (14U) macro
19783 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)
19985 #define GTZC_TZSC1_SECCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
20142 #define GTZC_TZSC1_PRIVCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
20298 #define GTZC_TZIC1_IER2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
20500 #define GTZC_TZIC1_SR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
20702 #define GTZC_TZIC1_FCR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
Dstm32h563xx.h19233 #define GTZC_CFGR2_TIM17_Pos (14U) macro
19234 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)
19428 #define GTZC_TZSC1_SECCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
19579 #define GTZC_TZSC1_PRIVCFGR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
19729 #define GTZC_TZIC1_IER2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
19923 #define GTZC_TZIC1_SR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
20117 #define GTZC_TZIC1_FCR2_TIM17_Pos GTZC_CFGR2_TIM17_Pos
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba52xx.h5646 #define GTZC_CFGR2_TIM17_Pos GTZC_TZSC_SECCFGR2_TIM17SEC_Pos macro
5647 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)
Dstm32wba54xx.h5829 #define GTZC_CFGR2_TIM17_Pos GTZC_TZSC_SECCFGR2_TIM17SEC_Pos macro
5830 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)
Dstm32wba5mxx.h5829 #define GTZC_CFGR2_TIM17_Pos GTZC_TZSC_SECCFGR2_TIM17SEC_Pos macro
5830 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)
Dstm32wba55xx.h5829 #define GTZC_CFGR2_TIM17_Pos GTZC_TZSC_SECCFGR2_TIM17SEC_Pos macro
5830 #define GTZC_CFGR2_TIM17_Msk (0x01UL << GTZC_CFGR2_TIM17_Pos)