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Searched refs:GTZC_CFGR2_TIM16_Msk (Results 1 – 21 of 21) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h16466 #define GTZC_CFGR2_TIM16_Msk ( 0x01UL << GTZC_CFGR2_TIM16_Pos ) macro
16586 #define GTZC_TZSC_SECCFGR2_TIM16SEC_Msk GTZC_CFGR2_TIM16_Msk
16688 #define GTZC_TZSC_PRIVCFGR2_TIM16PRIV_Msk GTZC_CFGR2_TIM16_Msk
16810 #define GTZC_TZIC_IER2_TIM16IE_Msk GTZC_CFGR2_TIM16_Msk
16950 #define GTZC_TZIC_SR2_TIM16F_Msk GTZC_CFGR2_TIM16_Msk
17090 #define GTZC_TZIC_FCR2_TIM16FC_Msk GTZC_CFGR2_TIM16_Msk
Dstm32l562xx.h17211 #define GTZC_CFGR2_TIM16_Msk ( 0x01UL << GTZC_CFGR2_TIM16_Pos ) macro
17335 #define GTZC_TZSC_SECCFGR2_TIM16SEC_Msk GTZC_CFGR2_TIM16_Msk
17441 #define GTZC_TZSC_PRIVCFGR2_TIM16PRIV_Msk GTZC_CFGR2_TIM16_Msk
17569 #define GTZC_TZIC_IER2_TIM16IE_Msk GTZC_CFGR2_TIM16_Msk
17715 #define GTZC_TZIC_SR2_TIM16F_Msk GTZC_CFGR2_TIM16_Msk
17861 #define GTZC_TZIC_FCR2_TIM16FC_Msk GTZC_CFGR2_TIM16_Msk
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h18426 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro
18598 #define GTZC_TZSC1_SECCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
18718 #define GTZC_TZSC1_PRIVCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
18838 #define GTZC_TZIC1_IER2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
19008 #define GTZC_TZIC1_SR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
19178 #define GTZC_TZIC1_FCR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
Dstm32u535xx.h17874 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro
18038 #define GTZC_TZSC1_SECCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
18152 #define GTZC_TZSC1_PRIVCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
18266 #define GTZC_TZIC1_IER2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
18428 #define GTZC_TZIC1_SR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
18590 #define GTZC_TZIC1_FCR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
Dstm32u575xx.h19471 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro
19657 #define GTZC_TZSC1_SECCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
19787 #define GTZC_TZSC1_PRIVCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
19917 #define GTZC_TZIC1_IER2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
20103 #define GTZC_TZIC1_SR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
20289 #define GTZC_TZIC1_FCR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
Dstm32u585xx.h20081 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro
20277 #define GTZC_TZSC1_SECCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
20413 #define GTZC_TZSC1_PRIVCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
20549 #define GTZC_TZIC1_IER2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
20745 #define GTZC_TZIC1_SR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
20941 #define GTZC_TZIC1_FCR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
Dstm32u595xx.h20650 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro
20852 #define GTZC_TZSC1_SECCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
20992 #define GTZC_TZSC1_PRIVCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
21132 #define GTZC_TZIC1_IER2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
21334 #define GTZC_TZIC1_SR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
21536 #define GTZC_TZIC1_FCR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
Dstm32u5a5xx.h21260 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro
21472 #define GTZC_TZSC1_SECCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
21618 #define GTZC_TZSC1_PRIVCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
21764 #define GTZC_TZIC1_IER2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
21976 #define GTZC_TZIC1_SR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
22188 #define GTZC_TZIC1_FCR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
Dstm32u5f7xx.h22243 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro
22461 #define GTZC_TZSC1_SECCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
22613 #define GTZC_TZSC1_PRIVCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
22765 #define GTZC_TZIC1_IER2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
22983 #define GTZC_TZIC1_SR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
23201 #define GTZC_TZIC1_FCR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
Dstm32u599xx.h24424 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro
24636 #define GTZC_TZSC1_SECCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
24786 #define GTZC_TZSC1_PRIVCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
24936 #define GTZC_TZIC1_IER2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
25148 #define GTZC_TZIC1_SR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
25360 #define GTZC_TZIC1_FCR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
Dstm32u5g7xx.h22853 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro
23081 #define GTZC_TZSC1_SECCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
23239 #define GTZC_TZSC1_PRIVCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
23397 #define GTZC_TZIC1_IER2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
23625 #define GTZC_TZIC1_SR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
23853 #define GTZC_TZIC1_FCR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
Dstm32u5f9xx.h25384 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro
25604 #define GTZC_TZSC1_SECCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
25758 #define GTZC_TZSC1_PRIVCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
25912 #define GTZC_TZIC1_IER2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
26132 #define GTZC_TZIC1_SR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
26352 #define GTZC_TZIC1_FCR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
Dstm32u5a9xx.h25034 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro
25256 #define GTZC_TZSC1_SECCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
25412 #define GTZC_TZSC1_PRIVCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
25568 #define GTZC_TZIC1_IER2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
25790 #define GTZC_TZIC1_SR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
26012 #define GTZC_TZIC1_FCR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
Dstm32u5g9xx.h25994 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro
26224 #define GTZC_TZSC1_SECCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
26384 #define GTZC_TZSC1_PRIVCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
26544 #define GTZC_TZIC1_IER2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
26774 #define GTZC_TZIC1_SR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
27004 #define GTZC_TZIC1_FCR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h562xx.h17134 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro
17323 #define GTZC_TZSC1_SECCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
17468 #define GTZC_TZSC1_PRIVCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
17612 #define GTZC_TZIC1_IER2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
17800 #define GTZC_TZIC1_SR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
17988 #define GTZC_TZIC1_FCR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
Dstm32h573xx.h19781 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro
19984 #define GTZC_TZSC1_SECCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
20141 #define GTZC_TZSC1_PRIVCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
20297 #define GTZC_TZIC1_IER2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
20499 #define GTZC_TZIC1_SR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
20701 #define GTZC_TZIC1_FCR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
Dstm32h563xx.h19232 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro
19427 #define GTZC_TZSC1_SECCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
19578 #define GTZC_TZSC1_PRIVCFGR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
19728 #define GTZC_TZIC1_IER2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
19922 #define GTZC_TZIC1_SR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
20116 #define GTZC_TZIC1_FCR2_TIM16_Msk GTZC_CFGR2_TIM16_Msk
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba52xx.h5645 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro
Dstm32wba54xx.h5828 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro
Dstm32wba5mxx.h5828 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro
Dstm32wba55xx.h5828 #define GTZC_CFGR2_TIM16_Msk (0x01UL << GTZC_CFGR2_TIM16_Pos) macro