Home
last modified time | relevance | path

Searched refs:GTZC_CFGR1_LPTIM4_Pos (Results 1 – 13 of 13) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_gtzc.h345 #define GTZC_PERIPH_LPTIM4 (GTZC2_PERIPH_REG1 | GTZC_CFGR1_LPTIM4_Pos)
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h18509 #define GTZC_CFGR1_LPTIM4_Pos (5U) macro
18510 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos)
18653 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
18773 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
18919 #define GTZC_TZIC2_IER1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
19089 #define GTZC_TZIC2_SR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
19257 #define GTZC_TZIC2_FCR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
Dstm32u535xx.h17949 #define GTZC_CFGR1_LPTIM4_Pos (5U) macro
17950 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos)
18087 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
18201 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
18339 #define GTZC_TZIC2_IER1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
18501 #define GTZC_TZIC2_SR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
18661 #define GTZC_TZIC2_FCR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
Dstm32u575xx.h19564 #define GTZC_CFGR1_LPTIM4_Pos (5U) macro
19565 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos)
19718 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
19848 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
20010 #define GTZC_TZIC2_IER1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
20196 #define GTZC_TZIC2_SR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
20382 #define GTZC_TZIC2_FCR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
Dstm32u585xx.h20184 #define GTZC_CFGR1_LPTIM4_Pos (5U) macro
20185 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos)
20344 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
20480 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
20652 #define GTZC_TZIC2_IER1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
20848 #define GTZC_TZIC2_SR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
21044 #define GTZC_TZIC2_FCR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
Dstm32u595xx.h20753 #define GTZC_CFGR1_LPTIM4_Pos (5U) macro
20754 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos)
20917 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
21057 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
21235 #define GTZC_TZIC2_IER1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
21437 #define GTZC_TZIC2_SR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
21639 #define GTZC_TZIC2_FCR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
Dstm32u5a5xx.h21373 #define GTZC_CFGR1_LPTIM4_Pos (5U) macro
21374 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos)
21543 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
21689 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
21877 #define GTZC_TZIC2_IER1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
22089 #define GTZC_TZIC2_SR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
22301 #define GTZC_TZIC2_FCR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
Dstm32u5f7xx.h22362 #define GTZC_CFGR1_LPTIM4_Pos (5U) macro
22363 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos)
22538 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
22690 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
22884 #define GTZC_TZIC2_IER1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
23102 #define GTZC_TZIC2_SR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
23320 #define GTZC_TZIC2_FCR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
Dstm32u599xx.h24537 #define GTZC_CFGR1_LPTIM4_Pos (5U) macro
24538 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos)
24711 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
24861 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
25049 #define GTZC_TZIC2_IER1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
25261 #define GTZC_TZIC2_SR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
25473 #define GTZC_TZIC2_FCR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
Dstm32u5g7xx.h22982 #define GTZC_CFGR1_LPTIM4_Pos (5U) macro
22983 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos)
23164 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
23322 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
23526 #define GTZC_TZIC2_IER1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
23754 #define GTZC_TZIC2_SR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
23982 #define GTZC_TZIC2_FCR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
Dstm32u5f9xx.h25505 #define GTZC_CFGR1_LPTIM4_Pos (5U) macro
25506 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos)
25683 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
25837 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
26033 #define GTZC_TZIC2_IER1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
26253 #define GTZC_TZIC2_SR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
26473 #define GTZC_TZIC2_FCR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
Dstm32u5a9xx.h25157 #define GTZC_CFGR1_LPTIM4_Pos (5U) macro
25158 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos)
25337 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
25493 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
25691 #define GTZC_TZIC2_IER1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
25913 #define GTZC_TZIC2_SR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
26135 #define GTZC_TZIC2_FCR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
Dstm32u5g9xx.h26125 #define GTZC_CFGR1_LPTIM4_Pos (5U) macro
26126 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos)
26309 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
26469 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
26675 #define GTZC_TZIC2_IER1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
26905 #define GTZC_TZIC2_SR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos
27135 #define GTZC_TZIC2_FCR1_LPTIM4_Pos GTZC_CFGR1_LPTIM4_Pos