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Searched refs:GTZC_CFGR1_LPTIM4_Msk (Results 1 – 12 of 12) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h18510 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos) macro
18654 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
18774 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
18920 #define GTZC_TZIC2_IER1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
19090 #define GTZC_TZIC2_SR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
19258 #define GTZC_TZIC2_FCR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
Dstm32u535xx.h17950 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos) macro
18088 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
18202 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
18340 #define GTZC_TZIC2_IER1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
18502 #define GTZC_TZIC2_SR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
18662 #define GTZC_TZIC2_FCR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
Dstm32u575xx.h19565 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos) macro
19719 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
19849 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
20011 #define GTZC_TZIC2_IER1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
20197 #define GTZC_TZIC2_SR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
20383 #define GTZC_TZIC2_FCR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
Dstm32u585xx.h20185 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos) macro
20345 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
20481 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
20653 #define GTZC_TZIC2_IER1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
20849 #define GTZC_TZIC2_SR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
21045 #define GTZC_TZIC2_FCR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
Dstm32u595xx.h20754 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos) macro
20918 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
21058 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
21236 #define GTZC_TZIC2_IER1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
21438 #define GTZC_TZIC2_SR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
21640 #define GTZC_TZIC2_FCR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
Dstm32u5a5xx.h21374 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos) macro
21544 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
21690 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
21878 #define GTZC_TZIC2_IER1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
22090 #define GTZC_TZIC2_SR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
22302 #define GTZC_TZIC2_FCR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
Dstm32u5f7xx.h22363 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos) macro
22539 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
22691 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
22885 #define GTZC_TZIC2_IER1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
23103 #define GTZC_TZIC2_SR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
23321 #define GTZC_TZIC2_FCR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
Dstm32u599xx.h24538 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos) macro
24712 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
24862 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
25050 #define GTZC_TZIC2_IER1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
25262 #define GTZC_TZIC2_SR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
25474 #define GTZC_TZIC2_FCR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
Dstm32u5g7xx.h22983 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos) macro
23165 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
23323 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
23527 #define GTZC_TZIC2_IER1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
23755 #define GTZC_TZIC2_SR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
23983 #define GTZC_TZIC2_FCR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
Dstm32u5f9xx.h25506 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos) macro
25684 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
25838 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
26034 #define GTZC_TZIC2_IER1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
26254 #define GTZC_TZIC2_SR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
26474 #define GTZC_TZIC2_FCR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
Dstm32u5a9xx.h25158 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos) macro
25338 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
25494 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
25692 #define GTZC_TZIC2_IER1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
25914 #define GTZC_TZIC2_SR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
26136 #define GTZC_TZIC2_FCR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
Dstm32u5g9xx.h26126 #define GTZC_CFGR1_LPTIM4_Msk (0x01UL << GTZC_CFGR1_LPTIM4_Pos) macro
26310 #define GTZC_TZSC2_SECCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
26470 #define GTZC_TZSC2_PRIVCFGR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
26676 #define GTZC_TZIC2_IER1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
26906 #define GTZC_TZIC2_SR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk
27136 #define GTZC_TZIC2_FCR1_LPTIM4_Msk GTZC_CFGR1_LPTIM4_Msk