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Searched refs:GTZC_CFGR1_LPTIM1_Pos (Results 1 – 16 of 16) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_gtzc.h190 #define GTZC_PERIPH_LPTIM1 (GTZC_PERIPH_REG1 | GTZC_CFGR1_LPTIM1_Pos)
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_gtzc.h343 #define GTZC_PERIPH_LPTIM1 (GTZC2_PERIPH_REG1 | GTZC_CFGR1_LPTIM1_Pos)
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h16375 #define GTZC_CFGR1_LPTIM1_Pos (20U) macro
16376 #define GTZC_CFGR1_LPTIM1_Msk ( 0x01UL << GTZC_CFGR1_LPTIM1_Pos )
16515 #define GTZC_TZSC_SECCFGR1_LPTIM1SEC_Pos GTZC_CFGR1_LPTIM1_Pos
16617 #define GTZC_TZSC_PRIVCFGR1_LPTIM1PRIV_Pos GTZC_CFGR1_LPTIM1_Pos
16719 #define GTZC_TZIC_IER1_LPTIM1IE_Pos GTZC_CFGR1_LPTIM1_Pos
16859 #define GTZC_TZIC_SR1_LPTIM1F_Pos GTZC_CFGR1_LPTIM1_Pos
16999 #define GTZC_TZIC_FCR1_LPTIM1FC_Pos GTZC_CFGR1_LPTIM1_Pos
Dstm32l562xx.h17114 #define GTZC_CFGR1_LPTIM1_Pos (20U) macro
17115 #define GTZC_CFGR1_LPTIM1_Msk ( 0x01UL << GTZC_CFGR1_LPTIM1_Pos )
17260 #define GTZC_TZSC_SECCFGR1_LPTIM1SEC_Pos GTZC_CFGR1_LPTIM1_Pos
17366 #define GTZC_TZSC_PRIVCFGR1_LPTIM1PRIV_Pos GTZC_CFGR1_LPTIM1_Pos
17472 #define GTZC_TZIC_IER1_LPTIM1IE_Pos GTZC_CFGR1_LPTIM1_Pos
17618 #define GTZC_TZIC_SR1_LPTIM1F_Pos GTZC_CFGR1_LPTIM1_Pos
17764 #define GTZC_TZIC_FCR1_LPTIM1FC_Pos GTZC_CFGR1_LPTIM1_Pos
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h18505 #define GTZC_CFGR1_LPTIM1_Pos (3U) macro
18506 #define GTZC_CFGR1_LPTIM1_Msk (0x01UL << GTZC_CFGR1_LPTIM1_Pos)
18649 #define GTZC_TZSC2_SECCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
18769 #define GTZC_TZSC2_PRIVCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
18915 #define GTZC_TZIC2_IER1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
19085 #define GTZC_TZIC2_SR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
19253 #define GTZC_TZIC2_FCR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
Dstm32u535xx.h17945 #define GTZC_CFGR1_LPTIM1_Pos (3U) macro
17946 #define GTZC_CFGR1_LPTIM1_Msk (0x01UL << GTZC_CFGR1_LPTIM1_Pos)
18083 #define GTZC_TZSC2_SECCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
18197 #define GTZC_TZSC2_PRIVCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
18335 #define GTZC_TZIC2_IER1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
18497 #define GTZC_TZIC2_SR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
18657 #define GTZC_TZIC2_FCR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
Dstm32u575xx.h19560 #define GTZC_CFGR1_LPTIM1_Pos (3U) macro
19561 #define GTZC_CFGR1_LPTIM1_Msk (0x01UL << GTZC_CFGR1_LPTIM1_Pos)
19714 #define GTZC_TZSC2_SECCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
19844 #define GTZC_TZSC2_PRIVCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
20006 #define GTZC_TZIC2_IER1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
20192 #define GTZC_TZIC2_SR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
20378 #define GTZC_TZIC2_FCR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
Dstm32u585xx.h20180 #define GTZC_CFGR1_LPTIM1_Pos (3U) macro
20181 #define GTZC_CFGR1_LPTIM1_Msk (0x01UL << GTZC_CFGR1_LPTIM1_Pos)
20340 #define GTZC_TZSC2_SECCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
20476 #define GTZC_TZSC2_PRIVCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
20648 #define GTZC_TZIC2_IER1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
20844 #define GTZC_TZIC2_SR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
21040 #define GTZC_TZIC2_FCR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
Dstm32u595xx.h20749 #define GTZC_CFGR1_LPTIM1_Pos (3U) macro
20750 #define GTZC_CFGR1_LPTIM1_Msk (0x01UL << GTZC_CFGR1_LPTIM1_Pos)
20913 #define GTZC_TZSC2_SECCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
21053 #define GTZC_TZSC2_PRIVCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
21231 #define GTZC_TZIC2_IER1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
21433 #define GTZC_TZIC2_SR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
21635 #define GTZC_TZIC2_FCR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
Dstm32u5a5xx.h21369 #define GTZC_CFGR1_LPTIM1_Pos (3U) macro
21370 #define GTZC_CFGR1_LPTIM1_Msk (0x01UL << GTZC_CFGR1_LPTIM1_Pos)
21539 #define GTZC_TZSC2_SECCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
21685 #define GTZC_TZSC2_PRIVCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
21873 #define GTZC_TZIC2_IER1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
22085 #define GTZC_TZIC2_SR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
22297 #define GTZC_TZIC2_FCR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
Dstm32u5f7xx.h22358 #define GTZC_CFGR1_LPTIM1_Pos (3U) macro
22359 #define GTZC_CFGR1_LPTIM1_Msk (0x01UL << GTZC_CFGR1_LPTIM1_Pos)
22534 #define GTZC_TZSC2_SECCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
22686 #define GTZC_TZSC2_PRIVCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
22880 #define GTZC_TZIC2_IER1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
23098 #define GTZC_TZIC2_SR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
23316 #define GTZC_TZIC2_FCR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
Dstm32u599xx.h24533 #define GTZC_CFGR1_LPTIM1_Pos (3U) macro
24534 #define GTZC_CFGR1_LPTIM1_Msk (0x01UL << GTZC_CFGR1_LPTIM1_Pos)
24707 #define GTZC_TZSC2_SECCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
24857 #define GTZC_TZSC2_PRIVCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
25045 #define GTZC_TZIC2_IER1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
25257 #define GTZC_TZIC2_SR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
25469 #define GTZC_TZIC2_FCR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
Dstm32u5g7xx.h22978 #define GTZC_CFGR1_LPTIM1_Pos (3U) macro
22979 #define GTZC_CFGR1_LPTIM1_Msk (0x01UL << GTZC_CFGR1_LPTIM1_Pos)
23160 #define GTZC_TZSC2_SECCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
23318 #define GTZC_TZSC2_PRIVCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
23522 #define GTZC_TZIC2_IER1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
23750 #define GTZC_TZIC2_SR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
23978 #define GTZC_TZIC2_FCR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
Dstm32u5f9xx.h25501 #define GTZC_CFGR1_LPTIM1_Pos (3U) macro
25502 #define GTZC_CFGR1_LPTIM1_Msk (0x01UL << GTZC_CFGR1_LPTIM1_Pos)
25679 #define GTZC_TZSC2_SECCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
25833 #define GTZC_TZSC2_PRIVCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
26029 #define GTZC_TZIC2_IER1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
26249 #define GTZC_TZIC2_SR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
26469 #define GTZC_TZIC2_FCR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
Dstm32u5a9xx.h25153 #define GTZC_CFGR1_LPTIM1_Pos (3U) macro
25154 #define GTZC_CFGR1_LPTIM1_Msk (0x01UL << GTZC_CFGR1_LPTIM1_Pos)
25333 #define GTZC_TZSC2_SECCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
25489 #define GTZC_TZSC2_PRIVCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
25687 #define GTZC_TZIC2_IER1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
25909 #define GTZC_TZIC2_SR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
26131 #define GTZC_TZIC2_FCR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
Dstm32u5g9xx.h26121 #define GTZC_CFGR1_LPTIM1_Pos (3U) macro
26122 #define GTZC_CFGR1_LPTIM1_Msk (0x01UL << GTZC_CFGR1_LPTIM1_Pos)
26305 #define GTZC_TZSC2_SECCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
26465 #define GTZC_TZSC2_PRIVCFGR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
26671 #define GTZC_TZIC2_IER1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
26901 #define GTZC_TZIC2_SR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos
27131 #define GTZC_TZIC2_FCR1_LPTIM1_Pos GTZC_CFGR1_LPTIM1_Pos