/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/ |
D | stm32wbaxx_hal_gtzc.h | 161 #define GTZC_PERIPH_IWDG (GTZC_PERIPH_REG1 | GTZC_CFGR1_IWDG_Pos)
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/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/ |
D | stm32l5xx_hal_gtzc.h | 177 #define GTZC_PERIPH_IWDG (GTZC_PERIPH_REG1 | GTZC_CFGR1_IWDG_Pos)
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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/ |
D | stm32h5xx_hal_gtzc.h | 203 #define GTZC_PERIPH_IWDG (GTZC1_PERIPH_REG1 | GTZC_CFGR1_IWDG_Pos)
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/ |
D | stm32u5xx_hal_gtzc.h | 197 #define GTZC_PERIPH_IWDG (GTZC1_PERIPH_REG1 | GTZC_CFGR1_IWDG_Pos)
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/hal_stm32-latest/stm32cube/stm32l5xx/soc/ |
D | stm32l552xx.h | 16401 #define GTZC_CFGR1_IWDG_Pos (7U) macro 16402 #define GTZC_CFGR1_IWDG_Msk ( 0x01UL << GTZC_CFGR1_IWDG_Pos ) 16541 #define GTZC_TZSC_SECCFGR1_IWDGSEC_Pos GTZC_CFGR1_IWDG_Pos 16643 #define GTZC_TZSC_PRIVCFGR1_IWDGPRIV_Pos GTZC_CFGR1_IWDG_Pos 16745 #define GTZC_TZIC_IER1_IWDGIE_Pos GTZC_CFGR1_IWDG_Pos 16885 #define GTZC_TZIC_SR1_IWDGF_Pos GTZC_CFGR1_IWDG_Pos 17025 #define GTZC_TZIC_FCR1_IWDGFC_Pos GTZC_CFGR1_IWDG_Pos
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D | stm32l562xx.h | 17140 #define GTZC_CFGR1_IWDG_Pos (7U) macro 17141 #define GTZC_CFGR1_IWDG_Msk ( 0x01UL << GTZC_CFGR1_IWDG_Pos ) 17286 #define GTZC_TZSC_SECCFGR1_IWDGSEC_Pos GTZC_CFGR1_IWDG_Pos 17392 #define GTZC_TZSC_PRIVCFGR1_IWDGPRIV_Pos GTZC_CFGR1_IWDG_Pos 17498 #define GTZC_TZIC_IER1_IWDGIE_Pos GTZC_CFGR1_IWDG_Pos 17644 #define GTZC_TZIC_SR1_IWDGF_Pos GTZC_CFGR1_IWDG_Pos 17790 #define GTZC_TZIC_FCR1_IWDGFC_Pos GTZC_CFGR1_IWDG_Pos
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/hal_stm32-latest/stm32cube/stm32h5xx/soc/ |
D | stm32h523xx.h | 15753 #define GTZC_CFGR1_IWDG_Pos (10U) macro 15754 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos) 15904 #define GTZC_TZSC1_SECCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 16011 #define GTZC_TZSC1_PRIVCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 16117 #define GTZC_TZIC1_IER1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 16267 #define GTZC_TZIC1_SR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 16417 #define GTZC_TZIC1_FCR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos
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D | stm32h562xx.h | 17073 #define GTZC_CFGR1_IWDG_Pos (10U) macro 17074 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos) 17262 #define GTZC_TZSC1_SECCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 17407 #define GTZC_TZSC1_PRIVCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 17551 #define GTZC_TZIC1_IER1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 17739 #define GTZC_TZIC1_SR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 17927 #define GTZC_TZIC1_FCR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos
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D | stm32h533xx.h | 16302 #define GTZC_CFGR1_IWDG_Pos (10U) macro 16303 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos) 16461 #define GTZC_TZSC1_SECCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 16574 #define GTZC_TZSC1_PRIVCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 16686 #define GTZC_TZIC1_IER1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 16844 #define GTZC_TZIC1_SR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 17002 #define GTZC_TZIC1_FCR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos
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D | stm32h573xx.h | 19718 #define GTZC_CFGR1_IWDG_Pos (10U) macro 19719 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos) 19921 #define GTZC_TZSC1_SECCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 20078 #define GTZC_TZSC1_PRIVCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 20234 #define GTZC_TZIC1_IER1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 20436 #define GTZC_TZIC1_SR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 20638 #define GTZC_TZIC1_FCR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos
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D | stm32h563xx.h | 19169 #define GTZC_CFGR1_IWDG_Pos (10U) macro 19170 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos) 19364 #define GTZC_TZSC1_SECCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 19515 #define GTZC_TZSC1_PRIVCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 19665 #define GTZC_TZIC1_IER1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 19859 #define GTZC_TZIC1_SR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 20053 #define GTZC_TZIC1_FCR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos
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D | stm32h503xx.h | 10841 #define GTZC_CFGR1_IWDG_Pos (10U) macro 10842 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos) 10950 #define GTZC_TZSC1_PRIVCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos
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/hal_stm32-latest/stm32cube/stm32u5xx/soc/ |
D | stm32u545xx.h | 18391 #define GTZC_CFGR1_IWDG_Pos (7U) macro 18392 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos) 18563 #define GTZC_TZSC1_SECCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 18683 #define GTZC_TZSC1_PRIVCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 18803 #define GTZC_TZIC1_IER1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 18973 #define GTZC_TZIC1_SR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 19143 #define GTZC_TZIC1_FCR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos
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D | stm32u535xx.h | 17839 #define GTZC_CFGR1_IWDG_Pos (7U) macro 17840 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos) 18003 #define GTZC_TZSC1_SECCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 18117 #define GTZC_TZSC1_PRIVCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 18231 #define GTZC_TZIC1_IER1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 18393 #define GTZC_TZIC1_SR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 18555 #define GTZC_TZIC1_FCR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos
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D | stm32u575xx.h | 19432 #define GTZC_CFGR1_IWDG_Pos (7U) macro 19433 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos) 19618 #define GTZC_TZSC1_SECCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 19748 #define GTZC_TZSC1_PRIVCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 19878 #define GTZC_TZIC1_IER1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 20064 #define GTZC_TZIC1_SR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 20250 #define GTZC_TZIC1_FCR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos
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D | stm32u585xx.h | 20042 #define GTZC_CFGR1_IWDG_Pos (7U) macro 20043 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos) 20238 #define GTZC_TZSC1_SECCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 20374 #define GTZC_TZSC1_PRIVCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 20510 #define GTZC_TZIC1_IER1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 20706 #define GTZC_TZIC1_SR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 20902 #define GTZC_TZIC1_FCR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos
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D | stm32u595xx.h | 20605 #define GTZC_CFGR1_IWDG_Pos (7U) macro 20606 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos) 20807 #define GTZC_TZSC1_SECCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 20947 #define GTZC_TZSC1_PRIVCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 21087 #define GTZC_TZIC1_IER1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 21289 #define GTZC_TZIC1_SR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 21491 #define GTZC_TZIC1_FCR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos
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D | stm32u5a5xx.h | 21215 #define GTZC_CFGR1_IWDG_Pos (7U) macro 21216 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos) 21427 #define GTZC_TZSC1_SECCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 21573 #define GTZC_TZSC1_PRIVCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 21719 #define GTZC_TZIC1_IER1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 21931 #define GTZC_TZIC1_SR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 22143 #define GTZC_TZIC1_FCR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos
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D | stm32u5f7xx.h | 22198 #define GTZC_CFGR1_IWDG_Pos (7U) macro 22199 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos) 22416 #define GTZC_TZSC1_SECCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 22568 #define GTZC_TZSC1_PRIVCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 22720 #define GTZC_TZIC1_IER1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 22938 #define GTZC_TZIC1_SR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 23156 #define GTZC_TZIC1_FCR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos
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D | stm32u599xx.h | 24379 #define GTZC_CFGR1_IWDG_Pos (7U) macro 24380 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos) 24591 #define GTZC_TZSC1_SECCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 24741 #define GTZC_TZSC1_PRIVCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 24891 #define GTZC_TZIC1_IER1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 25103 #define GTZC_TZIC1_SR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 25315 #define GTZC_TZIC1_FCR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos
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D | stm32u5g7xx.h | 22808 #define GTZC_CFGR1_IWDG_Pos (7U) macro 22809 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos) 23036 #define GTZC_TZSC1_SECCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 23194 #define GTZC_TZSC1_PRIVCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 23352 #define GTZC_TZIC1_IER1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 23580 #define GTZC_TZIC1_SR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 23808 #define GTZC_TZIC1_FCR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos
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D | stm32u5f9xx.h | 25339 #define GTZC_CFGR1_IWDG_Pos (7U) macro 25340 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos) 25559 #define GTZC_TZSC1_SECCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 25713 #define GTZC_TZSC1_PRIVCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 25867 #define GTZC_TZIC1_IER1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 26087 #define GTZC_TZIC1_SR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 26307 #define GTZC_TZIC1_FCR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos
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D | stm32u5a9xx.h | 24989 #define GTZC_CFGR1_IWDG_Pos (7U) macro 24990 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos) 25211 #define GTZC_TZSC1_SECCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 25367 #define GTZC_TZSC1_PRIVCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 25523 #define GTZC_TZIC1_IER1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 25745 #define GTZC_TZIC1_SR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 25967 #define GTZC_TZIC1_FCR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos
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D | stm32u5g9xx.h | 25949 #define GTZC_CFGR1_IWDG_Pos (7U) macro 25950 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos) 26179 #define GTZC_TZSC1_SECCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 26339 #define GTZC_TZSC1_PRIVCFGR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 26499 #define GTZC_TZIC1_IER1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 26729 #define GTZC_TZIC1_SR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos 26959 #define GTZC_TZIC1_FCR1_IWDG_Pos GTZC_CFGR1_IWDG_Pos
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/hal_stm32-latest/stm32cube/stm32wbaxx/soc/ |
D | stm32wba52xx.h | 5628 #define GTZC_CFGR1_IWDG_Pos GTZC_TZSC_SECCFGR1_IWDGSEC_Pos macro 5629 #define GTZC_CFGR1_IWDG_Msk (0x01UL << GTZC_CFGR1_IWDG_Pos)
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