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Searched refs:GTZC_CFGR1_I2C4_Msk (Results 1 – 14 of 14) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h16372 #define GTZC_CFGR1_I2C4_Msk ( 0x01UL << GTZC_CFGR1_I2C4_Pos ) macro
16512 #define GTZC_TZSC_SECCFGR1_I2C4SEC_Msk GTZC_CFGR1_I2C4_Msk
16614 #define GTZC_TZSC_PRIVCFGR1_I2C4PRIV_Msk GTZC_CFGR1_I2C4_Msk
16716 #define GTZC_TZIC_IER1_I2C4IE_Msk GTZC_CFGR1_I2C4_Msk
16856 #define GTZC_TZIC_SR1_I2C4F_Msk GTZC_CFGR1_I2C4_Msk
16996 #define GTZC_TZIC_FCR1_I2C4FC_Msk GTZC_CFGR1_I2C4_Msk
Dstm32l562xx.h17111 #define GTZC_CFGR1_I2C4_Msk ( 0x01UL << GTZC_CFGR1_I2C4_Pos ) macro
17257 #define GTZC_TZSC_SECCFGR1_I2C4SEC_Msk GTZC_CFGR1_I2C4_Msk
17363 #define GTZC_TZSC_PRIVCFGR1_I2C4PRIV_Msk GTZC_CFGR1_I2C4_Msk
17469 #define GTZC_TZIC_IER1_I2C4IE_Msk GTZC_CFGR1_I2C4_Msk
17615 #define GTZC_TZIC_SR1_I2C4F_Msk GTZC_CFGR1_I2C4_Msk
17761 #define GTZC_TZIC_FCR1_I2C4FC_Msk GTZC_CFGR1_I2C4_Msk
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h18408 #define GTZC_CFGR1_I2C4_Msk (0x01UL << GTZC_CFGR1_I2C4_Pos) macro
18580 #define GTZC_TZSC1_SECCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
18700 #define GTZC_TZSC1_PRIVCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
18820 #define GTZC_TZIC1_IER1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
18990 #define GTZC_TZIC1_SR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
19160 #define GTZC_TZIC1_FCR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
Dstm32u535xx.h17856 #define GTZC_CFGR1_I2C4_Msk (0x01UL << GTZC_CFGR1_I2C4_Pos) macro
18020 #define GTZC_TZSC1_SECCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
18134 #define GTZC_TZSC1_PRIVCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
18248 #define GTZC_TZIC1_IER1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
18410 #define GTZC_TZIC1_SR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
18572 #define GTZC_TZIC1_FCR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
Dstm32u575xx.h19451 #define GTZC_CFGR1_I2C4_Msk (0x01UL << GTZC_CFGR1_I2C4_Pos) macro
19637 #define GTZC_TZSC1_SECCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
19767 #define GTZC_TZSC1_PRIVCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
19897 #define GTZC_TZIC1_IER1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
20083 #define GTZC_TZIC1_SR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
20269 #define GTZC_TZIC1_FCR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
Dstm32u585xx.h20061 #define GTZC_CFGR1_I2C4_Msk (0x01UL << GTZC_CFGR1_I2C4_Pos) macro
20257 #define GTZC_TZSC1_SECCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
20393 #define GTZC_TZSC1_PRIVCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
20529 #define GTZC_TZIC1_IER1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
20725 #define GTZC_TZIC1_SR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
20921 #define GTZC_TZIC1_FCR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
Dstm32u595xx.h20624 #define GTZC_CFGR1_I2C4_Msk (0x01UL << GTZC_CFGR1_I2C4_Pos) macro
20826 #define GTZC_TZSC1_SECCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
20966 #define GTZC_TZSC1_PRIVCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
21106 #define GTZC_TZIC1_IER1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
21308 #define GTZC_TZIC1_SR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
21510 #define GTZC_TZIC1_FCR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
Dstm32u5a5xx.h21234 #define GTZC_CFGR1_I2C4_Msk (0x01UL << GTZC_CFGR1_I2C4_Pos) macro
21446 #define GTZC_TZSC1_SECCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
21592 #define GTZC_TZSC1_PRIVCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
21738 #define GTZC_TZIC1_IER1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
21950 #define GTZC_TZIC1_SR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
22162 #define GTZC_TZIC1_FCR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
Dstm32u5f7xx.h22217 #define GTZC_CFGR1_I2C4_Msk (0x01UL << GTZC_CFGR1_I2C4_Pos) macro
22435 #define GTZC_TZSC1_SECCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
22587 #define GTZC_TZSC1_PRIVCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
22739 #define GTZC_TZIC1_IER1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
22957 #define GTZC_TZIC1_SR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
23175 #define GTZC_TZIC1_FCR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
Dstm32u599xx.h24398 #define GTZC_CFGR1_I2C4_Msk (0x01UL << GTZC_CFGR1_I2C4_Pos) macro
24610 #define GTZC_TZSC1_SECCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
24760 #define GTZC_TZSC1_PRIVCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
24910 #define GTZC_TZIC1_IER1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
25122 #define GTZC_TZIC1_SR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
25334 #define GTZC_TZIC1_FCR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
Dstm32u5g7xx.h22827 #define GTZC_CFGR1_I2C4_Msk (0x01UL << GTZC_CFGR1_I2C4_Pos) macro
23055 #define GTZC_TZSC1_SECCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
23213 #define GTZC_TZSC1_PRIVCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
23371 #define GTZC_TZIC1_IER1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
23599 #define GTZC_TZIC1_SR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
23827 #define GTZC_TZIC1_FCR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
Dstm32u5f9xx.h25358 #define GTZC_CFGR1_I2C4_Msk (0x01UL << GTZC_CFGR1_I2C4_Pos) macro
25578 #define GTZC_TZSC1_SECCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
25732 #define GTZC_TZSC1_PRIVCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
25886 #define GTZC_TZIC1_IER1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
26106 #define GTZC_TZIC1_SR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
26326 #define GTZC_TZIC1_FCR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
Dstm32u5a9xx.h25008 #define GTZC_CFGR1_I2C4_Msk (0x01UL << GTZC_CFGR1_I2C4_Pos) macro
25230 #define GTZC_TZSC1_SECCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
25386 #define GTZC_TZSC1_PRIVCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
25542 #define GTZC_TZIC1_IER1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
25764 #define GTZC_TZIC1_SR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
25986 #define GTZC_TZIC1_FCR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
Dstm32u5g9xx.h25968 #define GTZC_CFGR1_I2C4_Msk (0x01UL << GTZC_CFGR1_I2C4_Pos) macro
26198 #define GTZC_TZSC1_SECCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
26358 #define GTZC_TZSC1_PRIVCFGR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
26518 #define GTZC_TZIC1_IER1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
26748 #define GTZC_TZIC1_SR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk
26978 #define GTZC_TZIC1_FCR1_I2C4_Msk GTZC_CFGR1_I2C4_Msk