/hal_stm32-latest/stm32cube/stm32l5xx/soc/ |
D | stm32l552xx.h | 16386 #define GTZC_CFGR1_I2C2_Msk ( 0x01UL << GTZC_CFGR1_I2C2_Pos ) macro 16526 #define GTZC_TZSC_SECCFGR1_I2C2SEC_Msk GTZC_CFGR1_I2C2_Msk 16628 #define GTZC_TZSC_PRIVCFGR1_I2C2PRIV_Msk GTZC_CFGR1_I2C2_Msk 16730 #define GTZC_TZIC_IER1_I2C2IE_Msk GTZC_CFGR1_I2C2_Msk 16870 #define GTZC_TZIC_SR1_I2C2F_Msk GTZC_CFGR1_I2C2_Msk 17010 #define GTZC_TZIC_FCR1_I2C2FC_Msk GTZC_CFGR1_I2C2_Msk
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D | stm32l562xx.h | 17125 #define GTZC_CFGR1_I2C2_Msk ( 0x01UL << GTZC_CFGR1_I2C2_Pos ) macro 17271 #define GTZC_TZSC_SECCFGR1_I2C2SEC_Msk GTZC_CFGR1_I2C2_Msk 17377 #define GTZC_TZSC_PRIVCFGR1_I2C2PRIV_Msk GTZC_CFGR1_I2C2_Msk 17483 #define GTZC_TZIC_IER1_I2C2IE_Msk GTZC_CFGR1_I2C2_Msk 17629 #define GTZC_TZIC_SR1_I2C2F_Msk GTZC_CFGR1_I2C2_Msk 17775 #define GTZC_TZIC_FCR1_I2C2FC_Msk GTZC_CFGR1_I2C2_Msk
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/hal_stm32-latest/stm32cube/stm32h5xx/soc/ |
D | stm32h523xx.h | 15770 #define GTZC_CFGR1_I2C2_Msk (0x01UL << GTZC_CFGR1_I2C2_Pos) macro 15921 #define GTZC_TZSC1_SECCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 16028 #define GTZC_TZSC1_PRIVCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 16134 #define GTZC_TZIC1_IER1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 16284 #define GTZC_TZIC1_SR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 16434 #define GTZC_TZIC1_FCR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk
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D | stm32h562xx.h | 17090 #define GTZC_CFGR1_I2C2_Msk (0x01UL << GTZC_CFGR1_I2C2_Pos) macro 17279 #define GTZC_TZSC1_SECCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 17424 #define GTZC_TZSC1_PRIVCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 17568 #define GTZC_TZIC1_IER1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 17756 #define GTZC_TZIC1_SR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 17944 #define GTZC_TZIC1_FCR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk
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D | stm32h533xx.h | 16319 #define GTZC_CFGR1_I2C2_Msk (0x01UL << GTZC_CFGR1_I2C2_Pos) macro 16478 #define GTZC_TZSC1_SECCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 16591 #define GTZC_TZSC1_PRIVCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 16703 #define GTZC_TZIC1_IER1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 16861 #define GTZC_TZIC1_SR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 17019 #define GTZC_TZIC1_FCR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk
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D | stm32h573xx.h | 19735 #define GTZC_CFGR1_I2C2_Msk (0x01UL << GTZC_CFGR1_I2C2_Pos) macro 19938 #define GTZC_TZSC1_SECCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 20095 #define GTZC_TZSC1_PRIVCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 20251 #define GTZC_TZIC1_IER1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 20453 #define GTZC_TZIC1_SR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 20655 #define GTZC_TZIC1_FCR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk
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D | stm32h563xx.h | 19186 #define GTZC_CFGR1_I2C2_Msk (0x01UL << GTZC_CFGR1_I2C2_Pos) macro 19381 #define GTZC_TZSC1_SECCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 19532 #define GTZC_TZSC1_PRIVCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 19682 #define GTZC_TZIC1_IER1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 19876 #define GTZC_TZIC1_SR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 20070 #define GTZC_TZIC1_FCR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk
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D | stm32h503xx.h | 10854 #define GTZC_CFGR1_I2C2_Msk (0x01UL << GTZC_CFGR1_I2C2_Pos) macro 10959 #define GTZC_TZSC1_PRIVCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk
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/hal_stm32-latest/stm32cube/stm32u5xx/soc/ |
D | stm32u545xx.h | 18404 #define GTZC_CFGR1_I2C2_Msk (0x01UL << GTZC_CFGR1_I2C2_Pos) macro 18576 #define GTZC_TZSC1_SECCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 18696 #define GTZC_TZSC1_PRIVCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 18816 #define GTZC_TZIC1_IER1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 18986 #define GTZC_TZIC1_SR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 19156 #define GTZC_TZIC1_FCR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk
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D | stm32u535xx.h | 17852 #define GTZC_CFGR1_I2C2_Msk (0x01UL << GTZC_CFGR1_I2C2_Pos) macro 18016 #define GTZC_TZSC1_SECCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 18130 #define GTZC_TZSC1_PRIVCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 18244 #define GTZC_TZIC1_IER1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 18406 #define GTZC_TZIC1_SR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 18568 #define GTZC_TZIC1_FCR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk
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D | stm32u575xx.h | 19447 #define GTZC_CFGR1_I2C2_Msk (0x01UL << GTZC_CFGR1_I2C2_Pos) macro 19633 #define GTZC_TZSC1_SECCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 19763 #define GTZC_TZSC1_PRIVCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 19893 #define GTZC_TZIC1_IER1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 20079 #define GTZC_TZIC1_SR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 20265 #define GTZC_TZIC1_FCR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk
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D | stm32u585xx.h | 20057 #define GTZC_CFGR1_I2C2_Msk (0x01UL << GTZC_CFGR1_I2C2_Pos) macro 20253 #define GTZC_TZSC1_SECCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 20389 #define GTZC_TZSC1_PRIVCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 20525 #define GTZC_TZIC1_IER1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 20721 #define GTZC_TZIC1_SR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 20917 #define GTZC_TZIC1_FCR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk
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D | stm32u595xx.h | 20620 #define GTZC_CFGR1_I2C2_Msk (0x01UL << GTZC_CFGR1_I2C2_Pos) macro 20822 #define GTZC_TZSC1_SECCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 20962 #define GTZC_TZSC1_PRIVCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 21102 #define GTZC_TZIC1_IER1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 21304 #define GTZC_TZIC1_SR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 21506 #define GTZC_TZIC1_FCR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk
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D | stm32u5a5xx.h | 21230 #define GTZC_CFGR1_I2C2_Msk (0x01UL << GTZC_CFGR1_I2C2_Pos) macro 21442 #define GTZC_TZSC1_SECCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 21588 #define GTZC_TZSC1_PRIVCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 21734 #define GTZC_TZIC1_IER1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 21946 #define GTZC_TZIC1_SR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 22158 #define GTZC_TZIC1_FCR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk
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D | stm32u5f7xx.h | 22213 #define GTZC_CFGR1_I2C2_Msk (0x01UL << GTZC_CFGR1_I2C2_Pos) macro 22431 #define GTZC_TZSC1_SECCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 22583 #define GTZC_TZSC1_PRIVCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 22735 #define GTZC_TZIC1_IER1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 22953 #define GTZC_TZIC1_SR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 23171 #define GTZC_TZIC1_FCR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk
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D | stm32u599xx.h | 24394 #define GTZC_CFGR1_I2C2_Msk (0x01UL << GTZC_CFGR1_I2C2_Pos) macro 24606 #define GTZC_TZSC1_SECCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 24756 #define GTZC_TZSC1_PRIVCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 24906 #define GTZC_TZIC1_IER1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 25118 #define GTZC_TZIC1_SR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 25330 #define GTZC_TZIC1_FCR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk
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D | stm32u5g7xx.h | 22823 #define GTZC_CFGR1_I2C2_Msk (0x01UL << GTZC_CFGR1_I2C2_Pos) macro 23051 #define GTZC_TZSC1_SECCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 23209 #define GTZC_TZSC1_PRIVCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 23367 #define GTZC_TZIC1_IER1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 23595 #define GTZC_TZIC1_SR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 23823 #define GTZC_TZIC1_FCR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk
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D | stm32u5f9xx.h | 25354 #define GTZC_CFGR1_I2C2_Msk (0x01UL << GTZC_CFGR1_I2C2_Pos) macro 25574 #define GTZC_TZSC1_SECCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 25728 #define GTZC_TZSC1_PRIVCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 25882 #define GTZC_TZIC1_IER1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 26102 #define GTZC_TZIC1_SR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 26322 #define GTZC_TZIC1_FCR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk
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D | stm32u5a9xx.h | 25004 #define GTZC_CFGR1_I2C2_Msk (0x01UL << GTZC_CFGR1_I2C2_Pos) macro 25226 #define GTZC_TZSC1_SECCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 25382 #define GTZC_TZSC1_PRIVCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 25538 #define GTZC_TZIC1_IER1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 25760 #define GTZC_TZIC1_SR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 25982 #define GTZC_TZIC1_FCR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk
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D | stm32u5g9xx.h | 25964 #define GTZC_CFGR1_I2C2_Msk (0x01UL << GTZC_CFGR1_I2C2_Pos) macro 26194 #define GTZC_TZSC1_SECCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 26354 #define GTZC_TZSC1_PRIVCFGR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 26514 #define GTZC_TZIC1_IER1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 26744 #define GTZC_TZIC1_SR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk 26974 #define GTZC_TZIC1_FCR1_I2C2_Msk GTZC_CFGR1_I2C2_Msk
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