/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/ |
D | stm32wbaxx_hal_gtzc.h | 165 #define GTZC_PERIPH_I2C1 (GTZC_PERIPH_REG1 | GTZC_CFGR1_I2C1_Pos)
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/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/ |
D | stm32l5xx_hal_gtzc.h | 184 #define GTZC_PERIPH_I2C1 (GTZC_PERIPH_REG1 | GTZC_CFGR1_I2C1_Pos)
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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/ |
D | stm32h5xx_hal_gtzc.h | 214 #define GTZC_PERIPH_I2C1 (GTZC1_PERIPH_REG1 | GTZC_CFGR1_I2C1_Pos)
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/ |
D | stm32u5xx_hal_gtzc.h | 205 #define GTZC_PERIPH_I2C1 (GTZC1_PERIPH_REG1 | GTZC_CFGR1_I2C1_Pos)
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/hal_stm32-latest/stm32cube/stm32l5xx/soc/ |
D | stm32l552xx.h | 16387 #define GTZC_CFGR1_I2C1_Pos (14U) macro 16388 #define GTZC_CFGR1_I2C1_Msk ( 0x01UL << GTZC_CFGR1_I2C1_Pos ) 16527 #define GTZC_TZSC_SECCFGR1_I2C1SEC_Pos GTZC_CFGR1_I2C1_Pos 16629 #define GTZC_TZSC_PRIVCFGR1_I2C1PRIV_Pos GTZC_CFGR1_I2C1_Pos 16731 #define GTZC_TZIC_IER1_I2C1IE_Pos GTZC_CFGR1_I2C1_Pos 16871 #define GTZC_TZIC_SR1_I2C1F_Pos GTZC_CFGR1_I2C1_Pos 17011 #define GTZC_TZIC_FCR1_I2C1FC_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32l562xx.h | 17126 #define GTZC_CFGR1_I2C1_Pos (14U) macro 17127 #define GTZC_CFGR1_I2C1_Msk ( 0x01UL << GTZC_CFGR1_I2C1_Pos ) 17272 #define GTZC_TZSC_SECCFGR1_I2C1SEC_Pos GTZC_CFGR1_I2C1_Pos 17378 #define GTZC_TZSC_PRIVCFGR1_I2C1PRIV_Pos GTZC_CFGR1_I2C1_Pos 17484 #define GTZC_TZIC_IER1_I2C1IE_Pos GTZC_CFGR1_I2C1_Pos 17630 #define GTZC_TZIC_SR1_I2C1F_Pos GTZC_CFGR1_I2C1_Pos 17776 #define GTZC_TZIC_FCR1_I2C1FC_Pos GTZC_CFGR1_I2C1_Pos
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/hal_stm32-latest/stm32cube/stm32h5xx/soc/ |
D | stm32h523xx.h | 15767 #define GTZC_CFGR1_I2C1_Pos (17U) macro 15768 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 15918 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 16025 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 16131 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 16281 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 16431 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32h562xx.h | 17087 #define GTZC_CFGR1_I2C1_Pos (17U) macro 17088 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 17276 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 17421 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 17565 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 17753 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 17941 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32h533xx.h | 16316 #define GTZC_CFGR1_I2C1_Pos (17U) macro 16317 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 16475 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 16588 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 16700 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 16858 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 17016 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32h573xx.h | 19732 #define GTZC_CFGR1_I2C1_Pos (17U) macro 19733 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 19935 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20092 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20248 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20450 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20652 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32h563xx.h | 19183 #define GTZC_CFGR1_I2C1_Pos (17U) macro 19184 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 19378 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 19529 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 19679 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 19873 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20067 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32h503xx.h | 10851 #define GTZC_CFGR1_I2C1_Pos (17U) macro 10852 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 10956 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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/hal_stm32-latest/stm32cube/stm32u5xx/soc/ |
D | stm32u545xx.h | 18401 #define GTZC_CFGR1_I2C1_Pos (13U) macro 18402 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 18573 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 18693 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 18813 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 18983 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 19153 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u535xx.h | 17849 #define GTZC_CFGR1_I2C1_Pos (13U) macro 17850 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 18013 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 18127 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 18241 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 18403 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 18565 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u575xx.h | 19444 #define GTZC_CFGR1_I2C1_Pos (13U) macro 19445 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 19630 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 19760 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 19890 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20076 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20262 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u585xx.h | 20054 #define GTZC_CFGR1_I2C1_Pos (13U) macro 20055 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 20250 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20386 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20522 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20718 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20914 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u595xx.h | 20617 #define GTZC_CFGR1_I2C1_Pos (13U) macro 20618 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 20819 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20959 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 21099 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 21301 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 21503 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u5a5xx.h | 21227 #define GTZC_CFGR1_I2C1_Pos (13U) macro 21228 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 21439 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 21585 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 21731 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 21943 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 22155 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u5f7xx.h | 22210 #define GTZC_CFGR1_I2C1_Pos (13U) macro 22211 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 22428 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 22580 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 22732 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 22950 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 23168 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u599xx.h | 24391 #define GTZC_CFGR1_I2C1_Pos (13U) macro 24392 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 24603 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 24753 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 24903 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 25115 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 25327 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u5g7xx.h | 22820 #define GTZC_CFGR1_I2C1_Pos (13U) macro 22821 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 23048 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 23206 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 23364 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 23592 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 23820 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u5f9xx.h | 25351 #define GTZC_CFGR1_I2C1_Pos (13U) macro 25352 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 25571 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 25725 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 25879 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 26099 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 26319 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u5a9xx.h | 25001 #define GTZC_CFGR1_I2C1_Pos (13U) macro 25002 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 25223 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 25379 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 25535 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 25757 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 25979 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u5g9xx.h | 25961 #define GTZC_CFGR1_I2C1_Pos (13U) macro 25962 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 26191 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 26351 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 26511 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 26741 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 26971 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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/hal_stm32-latest/stm32cube/stm32wbaxx/soc/ |
D | stm32wba52xx.h | 5632 #define GTZC_CFGR1_I2C1_Pos GTZC_TZSC_SECCFGR1_I2C1SEC_Pos macro 5633 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos)
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