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Searched refs:GPIO_BSRR_BR5_Pos (Results 1 – 25 of 203) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h3233 #define GPIO_BSRR_BR5_Pos (21U) macro
3234 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
3316 #define GPIO_BRR_BR5_Pos GPIO_BSRR_BR5_Pos
Dstm32f410rx.h3233 #define GPIO_BSRR_BR5_Pos (21U) macro
3234 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
3316 #define GPIO_BRR_BR5_Pos GPIO_BSRR_BR5_Pos
Dstm32f410tx.h3223 #define GPIO_BSRR_BR5_Pos (21U) macro
3224 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
3306 #define GPIO_BRR_BR5_Pos GPIO_BSRR_BR5_Pos
Dstm32f401xc.h3154 #define GPIO_BSRR_BR5_Pos (21U) macro
3155 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
3237 #define GPIO_BRR_BR5_Pos GPIO_BSRR_BR5_Pos
Dstm32f401xe.h3154 #define GPIO_BSRR_BR5_Pos (21U) macro
3155 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
3237 #define GPIO_BRR_BR5_Pos GPIO_BSRR_BR5_Pos
Dstm32f411xe.h3157 #define GPIO_BSRR_BR5_Pos (21U) macro
3158 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
3240 #define GPIO_BRR_BR5_Pos GPIO_BSRR_BR5_Pos
Dstm32f405xx.h8438 #define GPIO_BSRR_BR5_Pos (21U) macro
8439 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
8521 #define GPIO_BRR_BR5_Pos GPIO_BSRR_BR5_Pos
Dstm32f412cx.h7307 #define GPIO_BSRR_BR5_Pos (21U) macro
7308 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
7390 #define GPIO_BRR_BR5_Pos GPIO_BSRR_BR5_Pos
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h1630 #define GPIO_BSRR_BR5_Pos (21U) macro
1631 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
Dstm32f101xb.h1675 #define GPIO_BSRR_BR5_Pos (21U) macro
1676 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
Dstm32f100xb.h1833 #define GPIO_BSRR_BR5_Pos (21U) macro
1834 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
Dstm32f102x6.h1679 #define GPIO_BSRR_BR5_Pos (21U) macro
1680 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
Dstm32f100xe.h2162 #define GPIO_BSRR_BR5_Pos (21U) macro
2163 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
Dstm32f101xg.h2125 #define GPIO_BSRR_BR5_Pos (21U) macro
2126 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
Dstm32f101xe.h2064 #define GPIO_BSRR_BR5_Pos (21U) macro
2065 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
Dstm32f102xb.h1716 #define GPIO_BSRR_BR5_Pos (21U) macro
1717 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h2945 #define GPIO_BSRR_BR5_Pos (21U) macro
2946 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
Dstm32c031xx.h2952 #define GPIO_BSRR_BR5_Pos (21U) macro
2953 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
Dstm32c071xx.h3231 #define GPIO_BSRR_BR5_Pos (21U) macro
3232 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h2963 #define GPIO_BSRR_BR5_Pos (21U) macro
2964 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
Dstm32g050xx.h2982 #define GPIO_BSRR_BR5_Pos (21U) macro
2983 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
Dstm32g070xx.h2991 #define GPIO_BSRR_BR5_Pos (21U) macro
2992 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
Dstm32g031xx.h3114 #define GPIO_BSRR_BR5_Pos (21U) macro
3115 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
Dstm32g041xx.h3350 #define GPIO_BSRR_BR5_Pos (21U) macro
3351 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
Dstm32g051xx.h3450 #define GPIO_BSRR_BR5_Pos (21U) macro
3451 #define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */

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