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Searched refs:GPDMA1_Channel5_BASE_S (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba52xx.h1149 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
1328 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
1408 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32wba54xx.h1221 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
1414 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
1503 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32wba5mxx.h1221 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
1414 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
1503 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32wba55xx.h1221 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
1414 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
1503 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h1711 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
2179 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
2297 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32h562xx.h1843 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
2359 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
2490 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32h533xx.h1782 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
2288 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
2413 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32h573xx.h2100 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
2664 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
2804 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32h563xx.h2029 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
2555 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
2688 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h1745 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
2115 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
2255 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32u535xx.h1658 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
2011 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
2143 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32u575xx.h1902 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
2307 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
2452 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32u585xx.h1995 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
2427 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
2585 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32u595xx.h1966 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
2387 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
2538 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32u5a5xx.h2059 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
2507 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
2671 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32u5f7xx.h2151 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
2597 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
2754 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32u599xx.h2168 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
2612 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
2765 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32u5g7xx.h2244 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
2717 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
2887 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32u5f9xx.h2261 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
2713 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
2870 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32u5a9xx.h2261 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
2732 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
2898 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32u5g9xx.h2354 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
2833 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
3003 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h3222 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
3655 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
3937 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32n657xx.h3414 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
3918 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
4237 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32n655xx.h3379 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
3873 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
4186 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S
Dstm32n647xx.h3257 #define GPDMA1_Channel5_BASE_S (GPDMA1_BASE_S + 0x02D0UL) macro
3700 #define GPDMA1_Channel5_S ((DMA_Channel_TypeDef *) GPDMA1_Channel5_BASE_S)
3988 #define GPDMA1_Channel5_BASE GPDMA1_Channel5_BASE_S