Home
last modified time | relevance | path

Searched refs:GPDMA1_Channel0_BASE_S (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba52xx.h1144 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
1323 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
1398 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32wba54xx.h1216 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
1409 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
1493 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32wba5mxx.h1216 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
1409 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
1493 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32wba55xx.h1216 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
1409 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
1493 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h1706 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
2174 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
2282 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32h562xx.h1838 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
2354 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
2475 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32h533xx.h1777 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
2283 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
2398 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32h573xx.h2095 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
2659 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
2789 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32h563xx.h2024 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
2550 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
2673 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h1740 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
2110 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
2240 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32u535xx.h1653 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
2006 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
2128 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32u575xx.h1897 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
2302 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
2437 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32u585xx.h1990 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
2422 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
2570 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32u595xx.h1961 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
2382 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
2523 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32u5a5xx.h2054 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
2502 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
2656 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32u5f7xx.h2146 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
2592 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
2739 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32u599xx.h2163 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
2607 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
2750 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32u5g7xx.h2239 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
2712 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
2872 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32u5f9xx.h2256 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
2708 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
2855 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32u5a9xx.h2256 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
2727 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
2883 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32u5g9xx.h2349 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
2828 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
2988 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h3217 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
3650 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
3922 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32n657xx.h3409 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
3913 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
4222 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32n655xx.h3374 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
3868 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
4171 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S
Dstm32n647xx.h3252 #define GPDMA1_Channel0_BASE_S (GPDMA1_BASE_S + 0x0050UL) macro
3695 #define GPDMA1_Channel0_S ((DMA_Channel_TypeDef *) GPDMA1_Channel0_BASE_S)
3973 #define GPDMA1_Channel0_BASE GPDMA1_Channel0_BASE_S